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DM9321 数据表(PDF) 3 Page - National Semiconductor (TI) |
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DM9321 数据表(HTML) 3 Page - National Semiconductor (TI) |
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3 / 6 page ![]() Switching Characteristics VCC ea50V TA ea25 C (See Section 1 for test waveforms and output load) Symbol Parameter CL e 15 pF Units Min Max tPLH Propagation Delay An to On20 ns tPHL 21 tPLH Propagation Delay E to On14 ns tPHL 18 Functional Description The 9321 consists of two separate decoders each designed to accept two binary weighted inputs and provide four mutu- ally exclusive active LOW outputs as shown in the logic symbol Each decoder can be used as a 4-output demulti- plexer by using the enable as a data input Truth Table (Each Decoder) Inputs Outputs E A0 A1 O0O1O2O3 L L L L HHH L H L HLH H L L H H HLH L H H HHH L H X X HHHH H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Logic Diagram TLF10209 – 3 3 |
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