PCF2127AT datasheet(28/100 Pages) PHILIPS

28 / 100 page

PCF2127

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Product data sheet

Rev. 8 — 19 December 2014

28 of 100

NXP Semiconductors

PCF2127

Accurate RTC with integrated quartz crystal for industrial applications

8.8 Reset function

The PCF2127 has a Power-On Reset (POR) and a Power-On Reset Override (PORO)

function implemented.

8.8.1 Power-On Reset (POR)

The POR is active whenever the oscillator is stopped. The oscillator is considered to be

stopped during the time between power-on and stable crystal resonance (see Figure 16).

This time may be in the range of 200 ms to 2 s depending on temperature and supply

voltage. Whenever an internal reset occurs, the oscillator stop flag is set (OSF set

logic 1).

The OTP refresh (see Section 8.3.2 on page 13) should ideally be executed as the first

instruction after start-up and also after a reset due to an oscillator stop.

(1) Theoretical state of the signals since there is no power.

(2) The oscillator stop flag (OSF), set logic 1, indicates that the oscillation has stopped and a reset has

occurred since the flag was last cleared (OSF set logic 0). In this case, the integrity of the clock

information is not guaranteed. The OSF flag is cleared by command.

Fig 15. Power failure event due to battery discharge: reset occurs

PCF2127AT 数据表(PDF) 28 Page - NXP Semiconductors