PCF2127TSLASH2Y datasheet(10/100 Pages) PHILIPS

10 / 100 page

PCF2127

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Product data sheet

Rev. 8 — 19 December 2014

10 of 100

NXP Semiconductors

PCF2127

Accurate RTC with integrated quartz crystal for industrial applications

8.2 Control registers

The first 3 registers of the PCF2127, with the addresses 00h, 01h, and 02h, are used as

control registers.

8.2.1 Register Control_1

Table 6.

Control_1 - control and status register 1 (address 00h) bit allocation

Bits labeled as T must always be written with logic 0.

Bit

Symbol

EXT_

TEST

TSTOP

TSF1

POR_

OVRD

12_24

Reset

value

000

1000

Table 7.

Control_1 - control and status register 1 (address 00h) bit description

Bits labeled as T must always be written with logic 0.

Bit

Symbol

Value

Description

Reference

EXT_TEST

normal mode

Section 8.14

external clock test mode

unused

STOP

RTC source clock runs

Section 8.15

RTC clock is stopped;

RTC divider chain flip-flops are asynchronously

set logic 0;

CLKOUT at 32.768 kHz, 16.384 kHz, or

8.192 kHz is still available

TSF1

no timestamp interrupt generated

Section 8.12.1

flag set when TS input is driven to an intermediate

level between power supply and ground;

flag must be cleared to clear interrupt

POR_OVRD

Power-On Reset Override (PORO) facility disabled;

set logic 0 for normal operation

Section 8.8.2

Power-On Reset Override (PORO) sequence

reception enabled

12_24

24-hour mode selected

Table 33,

Table 49,

Table 74

12-hour mode selected

minute interrupt disabled

Section 8.13.1

minute interrupt enabled

second interrupt disabled

second interrupt enabled

PCF2127T/2Y 数据表(PDF) 10 Page - NXP Semiconductors

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