RM0016 datasheet(36/467 Pages) STMICROELECTRONICS

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Flash program memory and data EEPROM

RM0016

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DocID14587 Rev 14

4.4

Memory organization

4.4.1

STM8S and STM8AF memory organization

STM8S and STM8AF EEPROM is organized in 32-bit words (4 bytes per word).

The memory organization differs according to the devices:

•

Low density STM8S and STM8AF devices

–

8 Kbytes of Flash program memory organized in 128 pages or blocks of 64 bytes

each. The Flash program memory is divided into 2 areas, the user boot code area

(UBC), which size can be configured by option byte, and the main program

memory area. The Flash program memory is mapped in the upper part of the

STM8S addressing space and includes the reset and interrupt vectors.

–

Up to 640 bytes of data EEPROM (DATA) organized in pages or blocks of

64 bytes each. One block (64 bytes) contains the option bytes of which 11 are

used to configure the device hardware features. The options bytes can be

programmed in user, IAP and ICP/SWIM modes.

•

Medium density STM8S devices

–

From 16 to 32 Kbytes of Flash program memory organized in up to 64 pages of 4

blocks of 128 bytes each. The Flash program memory is divided into 2 areas, the

user boot code area (UBC), which size can be configured by option byte, and the

main program memory area. The Flash program memory is mapped in the upper

part of the STM8S addressing space and includes the reset and interrupt vectors.

–

Up to 1 Kbyte of data EEPROM (DATA) organized in up to 2 pages of 4 blocks of

128 bytes each. One block (128 bytes) contains the option bytes of which 13 are

used to configure the device hardware features. The options bytes can be

programmed in user, IAP and ICP/SWIM modes.

•

Medium density STM8AF devices

–

From 16 to 32 Kbytes of Flash program memory organized in up to 64 pages of 4

blocks of 128 bytes each. The Flash program memory is divided into 2 areas, the

user boot code area (UBC), which size can be configured by option byte, and the

main program memory area. The Flash program memory is mapped in the upper

part of the STM8AF addressing space and includes the reset and interrupt

vectors.

–

Up to 1 Kbyte of data EEPROM (DATA) organized in up to 2 pages of 4 blocks of

128 bytes each. One block (128 bytes) contains the option bytes of which 13 are

used to configure the device hardware features. The options bytes can be

programmed in user, IAP and ICP/SWIM modes.

•

High density STM8S devices

–

From 32 to 128 Kbytes of Flash program memory organized in up to 256 pages of

4 blocks of 128 bytes each. The Flash program memory is divided into 2 areas,

the user boot code area (UBC), which size can be configured by option byte, and

the main program memory area. The Flash program memory is mapped in the

upper part of the STM8S addressing space and includes the reset and interrupt

vectors.

–

Up to 2 Kbytes of data EEPROM (DATA) organized in up to 4 pages of 4 blocks of

128 bytes each. The size of the DATA area is fixed for a given microcontroller. One

block (128 bytes) contains the option bytes of which 15 are used to configure the

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