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CDP1824C/3 数据表(PDF) 5 Page - Intersil Corporation

部件名 CDP1824C/3
功能描述  High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
PDF  5 Pages
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

CDP1824C/3 数据表(HTML) 5 Page - Intersil Corporation

  CDP1824C/3 Datasheet HTML 1Page - Intersil Corporation CDP1824C/3 Datasheet HTML 2Page - Intersil Corporation CDP1824C/3 Datasheet HTML 3Page - Intersil Corporation CDP1824C/3 Datasheet HTML 4Page - Intersil Corporation CDP1824C/3 Datasheet HTML 5Page - Intersil Corporation  
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46
Static Burn-In Circuit
Data Retention Specifications
At TA = +25
oC
PARAMETER
SYMBOL
TEST
CONDITIONS
LIMITS
UNITS
CDP1824/3
CDP1824C/3
VDR
(V)
VDD
(V)
MIN
MAX
MIN
MAX
Data Retention Voltage
VDR
-
-
2.5
-
2.5
-
V
Data Retention Quiescent Current
IDD
2.5
-
-
10
-
40
µA
Chip Deselect to Data Retention Time
tCDR
2.5
5
600
-
600
-
ns
2.5
10
300
---ns
Recovery to Normal Operation Time
tRC
2.5
5
600
-
600
-
ns
2.5
10
300
---ns
TYPE
VDD
TEMPERATURE
TIME
CDP1824
11V
+125oC
160 Hrs., Min.
CDP1824C
7V
+125oC
160 Hrs., Min.
NOTE: tr, tf > 1µs.
FIGURE 3. LOW VDD DATA RETENTION WAVEFORMS AND TIMING DIAGRAM
DATA RETENTION
MODE
0.95 VDD
0.95 VDD
tF
VDD
tCDR
tF
tRC
VDD
VIH
VIL
VIL
VIH
CS
(NOTE 1)
(NOTE 1)
VDD
VDD
VSS
VSS
10
11
12
13
14
15
16
17
18
9
8
7
6
5
4
3
2
1
All Resistors 47k
Ω (±±20%)
CDP1824/3, CDP1824C/3



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