M45PE40 datasheet(6/35 Pages) STMICROELECTRONICS

部件名	M45PE40

功能描述	4 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 33 MHz SPI Bus Interface

PDF	35 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

6 / 35 page

M45PE40

6/35

SPI MODES

These devices can be driven by a microcontroller

with its SPI peripheral running in either of the two

following modes:

–

CPOL=0, CPHA=0

–

CPOL=1, CPHA=1

For these two modes, input data is latched in on

the rising edge of Serial Clock (C), and output data

is available from the falling edge of Serial Clock

(C).

The difference between the two modes, as shown

in Figure 5., is the clock polarity when the bus

master is in Stand-by mode and not transferring

data:

–

C remains at 0 for (CPOL=0, CPHA=0)

–

C remains at 1 for (CPOL=1, CPHA=1)

Figure 4. Bus Master and Memory Devices on the SPI Bus

Note: The Write Protect (W) signal should be driven, High or Low as appropriate.

Figure 5. SPI Modes Supported

AI04043B

Bus Master

(ST6, ST7, ST9,

ST10, Others)

SPI Memory

Device

SDO

SDI

SCK

CQD

SPI Memory

Device

CQD

SPI Memory

Device

CQD

CS3

CS2

CS1

SPI Interface with

(CPOL, CPHA) =

(0, 0) or (1, 1)

AI01438B

MSB

CPHA

CPOL

MSB

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