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USB333X 数据表(PDF) 49 Page - Microchip Technology |
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USB333X 数据表(HTML) 49 Page - Microchip Technology |
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49 / 85 page ![]() 2009 - 2015 Microchip Technology Inc. DS00001880A-page 49 USB333x 6.3.2.1 Disconnect Detection A High Speed host must detect a disconnect by sampling the transmitter outputs during the long EOP transmitted during a SOF packet. The USB333x only looks for a High Speed disconnect during the long EOP where the period is long enough for the disconnect reflection to return to the host PHY. When a High Speed disconnect occurs, the USB333x will return a RXCMD and set the host disconnect bit in the USB Interrupt Status register. When in FS or LS modes, the Link is expected to handle all disconnect detection. 6.3.2.2 Link Power Management (LPM) Token Receive The USB333x is fully capable of receiving the Extended PID in the LPM token. When the LPM 0000b PID is received, this information is passed to the Link as a normal receive packet. If the Link chooses to enter LPM suspend, the proce- dure detailed in Section 6.5.3, "Link Power Management (LPM)," on page 53 can be followed. 6.4 USB333x Transmitter The USB333x ULPI transmitter fully supports HS, FS, and LS transmit operations. Figure 6-1 shows the High Speed, Full Speed, and Low Speed transmitter block controlled by ULPI Protocol Block. Encoding of the USB packet follows the bit-stuffing and NRZI outlined in the USB 2.0 specification. Many of these functions are reused between the HS and FS/LS transmitters. When using the USB333x, Table 5-1 should always be used as a guideline on how to configure for various modes of operation. The transmitter decodes the inputs of XcvrSelect[1:0], TermSelect, OpMode[1:0], DpPull- down, and DmPulldown to determine what operation is expected. Users must strictly adhere to the modes of operation given in Table 5-1. Several important functions for a device and host are designed into the transmitter blocks. The USB333x transmitter will transmit a 32-bit long High Speed sync before every High Speed packet. In Full and Low Speed modes a 8-bit sync is transmitted. When the device or host needs to chirp for High Speed port negotiation, the OpMode = 10 setting will turn off the bit- stuffing and NRZI encoding in the transmitter. At the end of a chirp, the USB333x OpMode register bits should be changed only after the RXCMD linestate encoding indicates that the transmitter has completed transmitting. Should the opmode be switched to normal bit-stuffing and NRZI encoding before the transmit pipeline is empty, the remaining data in the pipeline may be transmitted in an bit-stuff encoding format. Please refer to the ULPI specification for a detailed discussion of USB reset and HS chirp. 6.4.1 USB333X HOST FEATURES The USB333x can also support USB Host operation and includes the following features that are required for Host oper- ation. 6.4.1.1 High Speed Long EOP When operating as a High Speed host, the USB333x will automatically generate a 40 bit long End of Packet (EOP) after a SOF PID (A5h). The USB333x determines when to send the 40-bit long EOP by decoding the ULPI TX CMD bits [3:0] for the SOF. The 40-bit long EOP is only transmitted when the DpPulldown and DmPulldown bits in the OTG Control register are asserted. The High Speed 40-bit long EOP is used to detect a disconnect in mode. In device mode, the USB333x will not send a long EOP after a SOF PID. 6.4.1.2 Low Speed Keep-Alive Low Speed keep alive is supported by the USB333x. When in Low Speed mode, the USB333x will send out two Low Speed bit times of SE0 when a SOF PID is received. 6.4.1.3 UTMI+ Level 3 Pre-amble is supported for UTMI+ Level 3 compatibility. When XcvrSelect is set to (11b) in host mode, (DpPulldown and DmPulldown both asserted) the USB333x will pre-pend a Full Speed pre-amble before the Low Speed packet. Full Speed rise and fall times are used in this mode. The pre-amble consists of the following: Full Speed sync, the encoded pre-PID (C3h) and then Full Speed idle (DP=1 and DM = 0). A Low Speed packet follows with a sync, data and a LS EOP. The USB333x will only support UTMI+ Level 3 as a host. The USB333x does not support UTMI+ Level 3 as a peripheral. A UTMI+ Level 3 peripheral is an upstream hub port. The USB333x will not decode a pre-amble packet intended for a LS device when the USB333x is configured as the upstream port of a FS hub, XcvrSelect = 11b, DpPulldown = 0b, DmPulldown =0b. |
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