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CDCVF857GQLR 数据表(PDF) 12 Page - Texas Instruments |
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CDCVF857GQLR 数据表(HTML) 12 Page - Texas Instruments |
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12 / 19 page ![]() CDCVF857 2.5V PHASELOCK LOOP CLOCK DRIVER SCAS047D − MARCH 2003 − REVISED JUNE 2005 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V DDQ GND CARD VIA CARD VIA Bead 0603 4.7 uF 1206 0.1 uF 0603 2200 pF 0603 AV DD AGN D See Notes 9, 10, and 11 PLL Figure 10. Recommended AVDD Filtering NOTES: 9. Place the 2200-pF capacitor close to the PLL. 10. Use a wide trace for the PLL analog power and ground. Connect PLL and capacitors to AGND trace and connect trace to one GND via (farthest from the PLL). 11. Recommended bead: Fair-Rite P/N 2506036017Y0 or equilvalent (0.8 Ω dc maximum, 600 Ω at 100 MHz). |
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