Enterprise / Memory Lines

PDS-PXE1-PXM1-C-001A

2

Memory Line Applications

Memory Line Description

VR12.5 Rev 1.5 and IMVP8 rev1.2 based systems

The Infineon Technologies memory digital controllers

provide intelligent power for today’s DDR3/DDR4

applications. Command and monitor functions are

controlled through the Intel SVID interface which

supports

5mV/step

VID

table,

dynamic

voltage

identification (DVID), power states (PS), and VR Data &

Configuration Register requirements.

Infineon’s memory controllers utilize digital technology to

implement all control functions, providing the ultimate

system solution in terms of flexibility and stability.

Advanced control loop features, such as Active Transient

Response (ATR) modulation and fast DVID response

enable optimal response to high di/dt load transients.

Programmable temperature compensation to current

sense allows the designer to tailor the response for best

loadline accuracy over temperature. Best in class noise

immunity is achieved through high oversample rate and

digital current estimation. Along with inductor DCR

current sensing, memory controllers also support

Infineon power stages with integrated current sense and

integrated temperature sense. Memory controllers

support either ΔVBE or PTAT temperature sensors which

provide accurate loadline performance.

Protection features include a comprehensive suite of

sophisticated

over-voltage,

under-voltage,

over-

temperature, and over-current protections. Memory

controllers also detect and protect against an open or

short circuit on the remote sensing inputs. These

attributes provide a complete and advanced protection

feature set for microprocessor and power systems.

Memory Line Features

applications

 Output voltage regulation range

 0.5V to 2.5V (10mV/step)

 0.25V to 1.52V (5mV/step)

 Programmable to support one, two, or three fully digitally

controlled voltage rails

 PMBus™ rev 1.2 compliant serial interface

 Query voltage, current, temperature faults

 Fault Response

 Supports start-up into pre-bias voltage

 Configurable autonomous phase add/drop

 Digitally programmable PID loop compensation

 Digital temperature compensation

 Input (+12V) power estimation

 Extensive fault detection and protection capability

 IUVP, IOVP, OUVP, OOVP (fixed and tracking)

 OCP instantaneous, averaged (total current), channel,

and pulse-to-pulse current limit protection

 Multiple internal and external OTP thresholds

 Open/short voltage sense line detection

 Negative current limit protection

 Internal non-volatile memory (NVM) for custom

configurations

 Combined state-machine and µ-controller core architecture

for maximum flexibility

 RoHS compliant and Halogen free QFN plastic package

Table 2

Part Number

Configuration

Temp Range

Package

Page

PXM1310CDM

3+1 phase

-5C to +85C

40-lead 5mm x 5mm QFN PG-VQFN-40

10