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VSC7440 数据表(PDF) 44 Page - Microsemi Corporation |
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VSC7440 数据表(HTML) 44 Page - Microsemi Corporation |
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44 / 444 page ![]() Functional Descriptions VMDS-10492 VSC7440 Datasheet Revision 4.2 27 Figure 8 • 10G Muxing The following table shows how the 10G ports connect to port modules and to SERDES macros for the different modes. 3.4.4 Logical Port Numbers The analyzer and the rewriter uses in many places a logical port number. For instance, when link aggregation is enabled, all ports within a link aggregation group must be configured to use the physical port number of the port with the lowest port number within the group as logical port group ID. The Table 7 • 10G Modes 10G Mode Port Number Port Module SERDES Macros SFI 9 DEV10G_0 SERDES10G_2 10 DEV10G_1 SERDES10G_3 1G/2.5G 9 DEV2G5_9 SERDES10G_2 10 DEV2G5_10 SERDES10G_3 DEV10G_0 Port #9 MAC10G HSIO::HW_CFG.DEV10G_0_MODE 10.3125 Gbps S9_TX/RXN/P XGANA XGDIG XGXFI PCS10G_BR DEV10G Register target Switch core KR FEC PCS1G (SGMII) DEV2G5_9 Port #9 MAC1G 1.25 Gbps DEV2G5 PCS_XFI (SFI) XGKR0 XGKR1 DEV10G_1 Port #10 MAC10G HSIO::HW_CFG.DEV10G_1_MODE 10.3125 Gbps S10_TX/RXN/P XGANA XGDIG XGXFI PCS10G_BR DEV10G Switch core KR FEC PCS1G (SGMII) DEV2G5_10 Port #10 MAC1G 1.25 Gbps DEV2G5 PCS_XFI (SFI) XGKR0 XGKR1 |
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