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AS7C331MFT18A-10BCN 数据表(PDF) 1 Page - Alliance Semiconductor Corporation

部件名 AS7C331MFT18A-10BCN
功能描述  3.3V 1M x 18 Flow-through synchronous SRAM
PDF  19 Pages
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制造商  ALSC [Alliance Semiconductor Corporation]
网页  https://www.alliancememory.com
标志 ALSC - Alliance Semiconductor Corporation

AS7C331MFT18A-10BCN 数据表(HTML) 1 Page - Alliance Semiconductor Corporation

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January 2005
Copyright © Alliance Semiconductor. All rights reserved.
®
AS7C331MFT18A
1/21/05, v 1.4
Alliance Semiconductor
1 of 19
3.3V 1M x 18 Flow-through synchronous SRAM
Features
• Organization: 1,048,576 words x18 bits
• Fast clock to data access: 6.8/7.5/8.5/10 ns
•Fast OE access time: 3.5/4.0 ns
• Fully synchronous flow-through operation
• Asynchronous output enable control
• Available 100-pin TQFP packages
• Individual byte write and global write
• Multiple chip enables for easy expansion
• 3.3 V core power supply
• 2.5 V or 3.3V I/O operation with separate VDDQ
• Linear or interleaved burst control
• Common data inputs and data outputs
• Snooze mode for reduced power-standby
Logic block diagram
Selection guide
-68
-75
-85
-10
Units
Minimum cycle time
7.5
8.5
10
12
ns
Maximum clock access time
6.8
7.5
8.5
10
ns
Maximum operating current
285
275
250
230
mA
Maximum standby current
90
90
80
80
mA
Maximum CMOS standby current (DC)
60
60
60
60
mA
Burst logic
ADV
ADSC
ADSP
CLK
LBO
CLK
CLR
CS
20
18
20
A[19:0]
20
Address
D
Q
CS
CLK
register
1M x 18
Memory
array
18
18
DQb
CLK
DQ
Byte Write
registers
DQa
CLK
DQ
Byte Write
registers
Enable
CLK
DQ
register
Enable
CLK
DQ
delay
register
CE
Output
buffers
Input
registers
Power
down
DQ[a,b]
2
CE0
CE1
CE2
BWb
BWa
OE
ZZ
OE
CLK
BWE
GWE
18


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