Preliminary Datasheet

LP1113

Functional Pin Description

Package Type

Pin Configurations

MSOP-10

1

2

3

4

10

9

8

7

VCC

BST

DVRH

SWN

DRVL

PGND

PWM

EN

5

6

NC

NC

MSOP-10

TOP VIEW

Pin

Name

Description

1

VCC

Input Supply. A 1.0μF ceramic capacitor should be connected from this pin to PGND.

2

BST

Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and

SW pins holds this bootstrap voltage for the high-side MOSFET as it is switched. The

recommended capacitor value is between 100nF and 1.0μF. An external diode is

required with the LP1113.

3

DRVH

Output drive for the upper MOSFET.

4

SWN

Switch Node. Connect to the source of the upper MOSFET.

5

NC

No Connect.

6

NC

No Connect.

7

EN

Output Disable. When low, normal operation is disabled forcing DRVH and DRVL low.

8

PWM

Logic-Level Input. This pin has primary control of the drive outputs.

9

PGND

Power Ground. Should be closely connected to the source of the lower MOSFET.

10

DRVL

Output drive for the lower MOSFET.

LP1113-00

Oct.-2017

Email: marketing@lowpowersemi.com

www.lowpowersemi.com

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