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LP3320 数据表(PDF) 7 Page - Lowpower Semiconductor inc |
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LP3320 数据表(HTML) 7 Page - Lowpower Semiconductor inc |
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7 / 9 page ![]() LP3320-00 Jan.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 9 Preliminary Datasheet LP3320 Layout Consideration For best performance of the LP3320, the following guidelines must be strictly followed. ※ Input and Output capacitors should be placed close to the IC and connected to ground plane to reduce noise coupling. ※ The GND and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection. ※ Keep the main current traces as possible as short and wide. ※ LX node of DC-DC converter is with high frequency voltage swing. It should be kept at a small area. ※ Place the feedback components as close as possible to the IC and keep away from the noisy devices. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) - TA ) / qJA Where TJ(MAX) is the maximum operation junction temperature. TA is the ambient temperature and the qJA is the junction to ambient thermal resistance. |
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