Preliminary Datasheet

LP3350

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Page 3 of 7

LP3350–00 Version 0.3 NOV-2017

Function Block Diagram

CS

OVP

Internal

Regulator

UVLO

GATE

Gate

Driver

Control

Logic

OSC

OTP

OCP

OVP

CTRL

EN / PWM

COMP

FB

EA and

Comp.

VIN

GND

Figure 3. Function Block Diagram

Functional Pin Description

Pin NO.

Pin Name

Description

1

VIN

Input Supply Pin. Decouple with 10

μF ceramic capacitor close to the pin.

2

GATE

External NMOS Gate Drive Pin.

3

GND

Ground.

4

CS

Current Sense Input Pin.

5

FB

Regulator Feedback Input. Connect to an external resistive to set the output current.

6

COMP

Regulator Error Amplifier Compensation Pin.

7

OVP

Over Voltage Protection Sense Input. Connect to an external resistive voltage divider

from the V+ to GND.

8

CTRL

Enable and External PWM Dimming Control.