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LP4059B6F 数据表(PDF) 2 Page - Lowpower Semiconductor inc |
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LP4059B6F 数据表(HTML) 2 Page - Lowpower Semiconductor inc |
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2 / 9 page ![]() LP4059-00 Jan.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 9 Preliminary Datasheet LP4059 Typical Application Circuit VCC CHRG GND BAT SLP PROG VIN BAT 1MΩ CIN 1uF CBAT 1uF RPROG 2KΩ Battery LED Functional Pin Description Package Type SOT23-6 DFN-6 Pin Configurations 1 2 3 6 5 4 CHRG GND BAT PROG SLP VCC SOT23-6 (Top View) 6 5 4 1 2 3 7 (PAD) CHRG SLP TDFN-6 (Top View) BAT PROG GND VCC Pin Description Pin Name Description SOT23-6 DFN-6 6 1 PROG Charge Current Program and Charge Current Monitor Pin. The charge current is programmed by connecting a 1% resistor, RPROG, to ground. When charging in constant-current mode, this pin servos to 1V. In all modes, the voltage on this pin can be used to measure the charge current using the following formula: IBAT=1000/RPROG 2 2 GND Ground. 4 3 VCC Positive Input Supply Voltage. Provide power to the charger. VCC can range from 4.5V to 6.5V and should be bypassed with at least a 1µF capacitor. When VCC drops to within 30mV of the BAT pin voltage, the LP4059 enters shutdown mode, dropping IBAT to less than1µA. 3 4 BAT Charge Current Output. Provides charge current to the battery and regulates the final float voltage to 4.2V. An internal precision resistor divider from this pin sets the float voltage. 5 5 SLP Connect to the I/O port of the MCU and connect a 1Mohm resistor to the BAT pin. 1 6 /CHRG Open-Drain Charge Status Output. When the battery is charging, the CHRG pin is pulled low by an internal N-channel MOSFET. When the LP4059 detects an under voltage lockout condition or charge complete, CHRG is forced high impedance. |
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