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LP6299 数据表(PDF) 8 Page - Lowpower Semiconductor inc

部件名 LP6299
功能描述  Programmable Gamma and VCOM Buffers
PDF  11 Pages
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制造商  POWER [Lowpower Semiconductor inc]
网页  http://www.lowpowersemi.com
标志 POWER - Lowpower Semiconductor inc

LP6299 数据表(HTML) 8 Page - Lowpower Semiconductor inc

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Preliminary Datasheet
LP6299
Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 8 of 11
LP6299 Version 0.2 FEB.-2018
Application Information
1. IIC Interface Specification
The LP6299 can easily modify parameters by IIC bus, that slave address is show below:
Slave Address
D6
D5
D4
D3
D2
D1
D0
W/R
1
1
1
0
1
0
Addr
0/1
IIC is a two wire serial interface developed, the bus consists of a clock line(SCL) and a data line(SDA)
with pull-up structures. The LP62
99 works as a slave mode, and address can set by Addr pin. The data
transfer protocol is follow IIC-Bus Specification's standard mode(100kbps) and fast mode(400kbps).
DATA
CLK
S
START condition
P
STOP condition
Figure 11. START and STOP Conditions
DATA
CLK
Data line
stable;
data valid
Change
of data
allowed
Figure 12. Bit Transfer on the Serial Interface
2. Write Data to Register
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W ACK
A6
A5
A4
A3
A2
A1
A0
A7
ACK
D6
D5
D4
D3
D2
D1
D0
D7
ACK
0
Slave Address
(Write Data )
Register Address
Data
Stop
Start
1
1
1
1
1
0
1
0
Addr
1
7
8
1
8
Figure 13. Write Single Byte Data to Register
3. Read Data to Register
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W ACK
A6
A5
A4
A3
A2
A1
A0
A7
ACK
1
Slave Address
(Read Data )
Register Address
Start
1
1
1
1
1
0
1
0
Addr
1
7
8
D6
D5
D4
D3
D2
D1
D0
D7
ACK
1
8
Sr
D6
D5
D4
D3
D2
D1
D0
D7
ACK
Data
Stop
1
8
Slave Address
Figure 14. Read Single Byte Data from Register



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