T1024RDBUG datasheet(13/49 Pages) FREESCALE

部件名	T1024RDBUG

功能描述	QorIQ T1024 Reference Design Board

PDF	49 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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13 / 49 page

CPLD

RGMII

GE PHY1

EC1_RST_N

EC2_RST_N

RGMII

GE PHY2

10GBASE-T

PHY

(AQR105)

XGT2_RST_N

TDMR_RST_N

PEX_RST

MPEX1_RST

MPEX2_RST

NOR_RSTN

NOR

FLASH

DDR3/

DDR3L

DDR_RSTN

RST_CTL

Reset

Source

select

COP_SRST_N

COP_HRST_N

HESET_REQ_N

HRSET_N

PORESET_N

COP_ITF

T1024

Push-Button

GND

MIC811

(Power-on RST)

PWR_RST_N

PWR_GODD

ATX PS

SW_RST

Soft reset register

RSTCON1 & RSTCON2

7 6

TDM Riser

SLOT

PEX SLOT

MINI PEX

SLOT

MINI PEX

SLOT

1 0

10GBASE-T

PHY

(AQR105)

XGT1_RST_N

Figure 2-2. Reset architecture

2.5 Clocks

The clock circuitry provides the following clocks for the processor:

• SYSCLK

• DDRCLK (single-ended and differential)

• SerDes clocks

• Ethernet clocks

• USB clock

The architecture of the clock section is shown in the following figure.

Chapter 2 Architecture

QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015

Freescale Semiconductor, Inc.

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