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IS25LP032D-RKLA3 数据表(PDF) 57 Page - Integrated Silicon Solution, Inc |
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IS25LP032D-RKLA3 数据表(HTML) 57 Page - Integrated Silicon Solution, Inc |
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57 / 118 page ![]() IS25LP032D IS25WP032D Integrated Silicon Solution, Inc.- www.issi.com 57 Rev. A12 08/04/2020 8.15 WRITE DISABLE OPERATION (WRDI, 04h) The Write Disable (WRDI) instruction resets the WEL bit and disables all write instructions. The WRDI instruction is not required after the execution of a write instruction, since the WEL bit is automatically reset. Figure 8.24 Write Disable Sequence In SPI Mode Instruction = 04h CE# SCK SI 0 1 2 3 4 5 6 7 Mode 3 Mode 0 SO High Impedance Figure 8.25 Write Disable Sequence In QPI Mode 04h CE# SCK IO[3:0] 0 1 Mode 3 Mode 0 |
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