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PIC16F913E/P301 数据表(PDF) 72 Page - Microchip Technology |
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PIC16F913E/P301 数据表(HTML) 72 Page - Microchip Technology |
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72 / 272 page ![]() PIC16F917/916/914/913 DS41250E-page 70 Preliminary © 2005 Microchip Technology Inc. REGISTER 4-1: OSCCON – OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh) U-0 R/W-1 R/W-1 R/W-0 R-q R-0 R-0 R/W-0 — IRCF2 IRCF1 IRCF0 OSTS(1) HTS LTS SCS bit 7 bit 0 bit 7 Unimplemented: Read as ‘0’ bit 6-4 IRCF<2:0>: Internal Oscillator Frequency Select bits 000 =31 kHz 001 =125 kHz 010 =250 kHz 011 =500 kHz 100 =1 MHz 101 =2 MHz 110 =4 MHz 111 =8 MHz bit 3 OSTS: Oscillator Start-up Time-out Status bit 1 = Device is running from the external system clock defined by FOSC<2:0> 0 = Device is running from the internal system clock (HFINTOSC or LFINTOSC) bit 2 HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit 1 =HFINTOSC is stable 0 = HFINTOSC is not stable bit 1 LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit 1 = LFINTOSC is stable 0 = LFINTOSC is not stable bit 0 SCS: System Clock Select bit 1 = Internal oscillator is used for system clock 0 = Clock source defined by FOSC<2:0> Note 1: The value of the OSTS bit on device power-up is dependent on the value of the Configuration Word (CONFIG) of the device. The value of the OSTS bit will be ‘0’ on a device Power-on Reset (POR) or any automatic clock switch, which may occur from Two-Speed Start-up or Fail-Safe Clock Monitor, if the following conditions are true: OSTS = 0 if: FOSC<2:0> = 000 (LP) or 001 (XT) or 010 (HS) and IESO = 1 or FSCM = 1 (IESO will be enabled automatically if FSCM is enabled) If any of the above conditions are not met, the value of the OSTS bit will be ‘1’ on a device POR. See Section 4.6 “Two-Speed Clock Start-up Mode” and Section 4.7 “Fail-Safe Clock Monitor” for more details. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown q = value depends on condition |
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