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STM32G071C8 数据表(PDF) 13 Page - STMicroelectronics |
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STM32G071C8 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 133 page  DS12232 Rev 3 13/133 STM32G071x8/xB Description 35 Figure 1. Block diagram MSv42182V2 UCPD USART3/4 USART1/2 LPTIMER 1/2 TIMER 16/17 Power domain of analog blocks : VBAT 4 channels BKIN, BKIN2, ETR System and peripheral clocks PAx PBx PCx PFx MOSI/SD MISO/MCK SCK/CK NSS/WS SWCLK SWDIO 16x IN OSC_IN OSC_OUT VBAT OSC32_IN OSC32_OUT RTC_OUT RTC_REFIN RTC_TS MOSI, MISO SCK, NSS HSI16 LSI PLLPCLK VDD IR_OUT 1 channel BKIN ETR, IN, OUT 1 channel 4 channels ETR 4 channels ETR CPU CORTEX-M0+ fmax = 64 MHz SWD NVIC EXTI SPI1/I2S SPI2 AHB-to-APB RCC Reset & clock control I/F XTAL OSC 4-48 MHz IWDG SRAM 36 KB I/F ADC RTC, TAMP Backup regs I/F RC 16 MHz RC 32 kHz PLL XTAL32 kHz I/F VDD 2 channels BKIN RX, TX CTS, RTS, CK RX, TX CTS, RTS, CK CEC TIM6 TIM7 COMP1 COMP2 IN+, IN-, OUT Port D Port C Port B Port A VDDA SUPPLY SUPERVISION POWER VCORE POR Reset Int VDD/VDDA VSS/VSSA NRST PVD POR/BOR Voltage regulator USART3 & 4 USART1 & 2 LPTIM1 & 2 TIM16 & 17 TIM15 TIM14 TIM3 TIM2 (32-bit) TIM1 GPIOs IOPORT HSE PLLQCLK PLLRCLK LSE LSE T sensor RX, TX, CTS, RTS LPUART TAMP_IN CC, DBCC FRSTX UCPD1 & 2 HDMI-CEC VREFBUF DAC I/F DAC_OUT1 DAC_OUT2 CRC VREF+ SCL, SDA SCL, SDA SMBA, SMBUS I2C1 I2C2 DBGMCU WWDG PWRCTRL SYSCFG DMA DMAMUX Port F PDx VDDA VDDIO1 Low-voltage detector VDD Parity Flash memory up to 128 KB VDDIO1 IRTIM from peripherals |
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