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ASM161 数据表(PDF) 2 Page - Alliance Semiconductor Corporation |
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ASM161 数据表(HTML) 2 Page - Alliance Semiconductor Corporation |
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2 / 9 page ![]() ASM161 / ASM162 2 of 9 Notice: The information in this document is subject to change without notice µP Supervisory Circuit rev 1.0 October 2003 Block Diagram Pin Configuration RESET is open drain Pin Description Pin # Pin Name Description ASM161 ASM162 1 1 GND Ground. 2 - RESET Active-LOW, open-drain reset output. RESET remains LOW while VCC is below the reset threshold and for 800ms minimum after VCC rises above the reset threshold. An external pull-up resistor is needed. - 2 RESET Active HIGH reset output. RESET remains HIGH while VCC is below the reset threshold and for 800ms after VCC rises above the reset threshold. 33 MR Manual reset input. A negative going edge transition on MR asserts reset. Reset remains asserted for one reset time-out period (800 ms min). This active-LOW input has an internal pull-up resistor. It can be driven from a TTL or CMOS logic line or shorted to ground with a switch. Leave open if unused. 44 VCC Power supply input voltage. + - Voltage Divider MR Debounce Bandgap Reference Reset Circuit * Edge Trigger RESET (ASM162) RESET (ASM161) VCC MR GND 1 2 3 4 ASM161/162 * Non-retriggerable, edge triggered manual reset Reset Circuit ASM161 VCC RPU 2 4 1 2 3 4 GND RESET MR VCC SOT-143 ASM161 1 2 3 4 GND RESET MR VCC SOT-143 ASM162 |
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