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ASM161JCUS/T 数据表(PDF) 3 Page - Alliance Semiconductor Corporation |
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ASM161JCUS/T 数据表(HTML) 3 Page - Alliance Semiconductor Corporation |
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3 / 9 page ![]() 3 of 9 Notice: The information in this document is subject to change without notice µP Supervisory Circuit ASM161 / ASM162 rev 1.0 October 2003 Detailed Descriptions The reset function ensures the microprocessor is properly reset and powers up into a known condition after a power failure. Reset Timing A reset is generated whenever the supply voltage is below the threshold level (VCC < VTH). The reset duration is at least 800ms after VCC has risen above the reset threshold and is guaranteed to be no more than 2 seconds. The rest signal remains active as long as the monitored supply voltage is below the internal threshold voltage. The ASM161 has an open-drain, active LOW RESET output (which is guaranteed to be in the correct state for VCC down to 1.1 V). The ASM161 uses an external pull-up resistor. Output leakage current is under 1µA. A high resistance value can be used to minimize current drain. The ASM162 generates an active-HIGH RESET output. Manual Reset The ASM161/162 have a unique manual reset circuit. A negative going edge transition on MR initiates the reset. A manual reset generates a single reset pulse of fixed length. The output-reset pulse remains asserted for the Reset Active Time-Out Period tRP and then clears. Once the reset pulse is completed, the MR input remains disabled for at least 49µS but not more than 122µS. This period is specified as tMRD. During the MR disabled period, the microcontroller is guaranteed a time period free of new manual reset signals. This period can be used to refresh critical DRAM contents or other system tasks. The MR pin must be taken HIGH and LOW again after the tMRD period has been completed to initiate another reset pulse. The manual reset input has an internal 20k Ω pull-up resistor. MR can be left open if not used. Application Information Glitch Resistance The ASM161/162 are relatively immune to short duration negative-going VCC transients/glitches. A VCC transient that goes 100mV below the reset threshold and lasts 20s or less will not typically cause a reset pulse. Valid Reset with VCC under 1.1V To ensure that logic inputs connected to the ASM162 RESET pin are in a known state when VCC is under 1.1V, a 100kΩ pull-down resistor at RESET is needed. The value is not critical. This scheme does not work with the open-drain outputs of ASM161. Part Number Reset Polarity ASM161 LOW (use external pull-up resistor) ASM162 HIGH MR input is blocked Ready Reset *Second and following edges ignored *........ next Triggering tMD tMRD Figure 1: Manual Reset Timing Time-Out Pulse for MR RESET MR VCC Power Supply ASM162 RESET GND MR Figure 2: RESET valid with VCC under 1.1V 100KΩ |
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