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Notice: The information in this document is subject to change without notice

3/3.3/4.0 V µP Supervisor Circuits

ASM706 P/ R/ S/ T/ J

ASM708 R/ S/ T/ J

October 2003

rev 1.0

second countdown. Additional transitions at WDI will reset

the watchdog timer and initiate a new countdown sequence.

WDO will also become LOW and remain so, whenever the

threshold. There is no minimum pulse width for WDO as

there is for the RESET outputs. If WDI is floated, WDO

essentially acts as a low supply voltage output indicator.

Power-failure Detection With Auxiliary Comparator

All devices have an auxiliary comparator with 1.25V trip point.

The output, PFO, is active LOW and the noninverting input is

PFI. This comparator can be used as a supply voltage

monitor with an external resistor voltage divider. As the

monitored voltage level falls, PFI is reduced causing the PFO

output to go LOW. Normally PFO interrupts the processor so

the system can be shut down in a controlled manner.

Application Information

Bi-directional Reset Pin Interfacing

The ASM706/8 can interface with µP/µC bi-directional reset

pins by connecting a 4.7k

Ω resistor in series with the RESET

output and the µP/µC bi-directional reset pin.

T/J RESET reset outputs no longer pull down; it becomes

indeterminate. To avoid the possibility that stray charges

could build up and force RESET to the wrong state, a pull-

down resistor should be connected to the RESET pin, thus

draining such charges to ground. The resistor value is not

critical. A100k

Ω resistor will pull RESET to ground without

loading it.

Figure 2: Watchdog timing

0V

Supply Voltage

BUF

Buffered

RESET

ASM70x

GND

GND

RESET

RESET

Input

µC or µP

4.7kΩ

Bi-directional I/O Pin

Figure 3: Bi-directional reset pin interfacing