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ASM1817-10F/T 数据表(PDF) 3 Page - Alliance Semiconductor Corporation |
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ASM1817-10F/T 数据表(HTML) 3 Page - Alliance Semiconductor Corporation |
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3 / 9 page ![]() 3 of 9 Notice: The information in this document is subject to change without notice Low Power, 3.3V/3.0V µP Reset ASM1817 rev 1.5 February 2005 Application Information Operation - Power Monitor The ASM1817 detects out-of-tolerance power supply conditions. It resets a processor during power-up, power- down and issues a reset to the system processor when the monitored power supply voltage is below the reset threshold. When an out-of-tolerance VCC voltage is detected, the RESET signal is asserted. On power-up, RESET is kept active (HIGH) for approximatley 150ms after the power supply voltage has reached the selected tolerance. This allows the power supply and microprocessor to stablize before RESET is released. Figure 1: Typical Application Microprocessor RESET RESET ASM1817 tRPU VCCTP (MIN) VCCTP VCCTP (MAX) tR VCC Figure 2: Timing Diagram: Power-Up VOL RESET tRPD VCC VCCTP (MAX) VCCTP VCCTP (MIN) tF RESET RESET Slews with VCC VOH Figure 3: Timing Diagram: Power-Down |
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