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ADL6012SCPZN-R2 数据表(PDF) 21 Page - Analog Devices |
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ADL6012SCPZN-R2 数据表(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() Data Sheet ADL6012 Rev. 0 | Page 21 of 24 ENABLE INTERFACE ENBL (Pin 1) provides the ability to enable or disable the device to conserve power. Connect ENBL to VPOS or above 1.5 V to enable the device. Connect ENBL to ground or below 0.5 V to disable the device. Do not exceed VPOS by 0.3 V or below ground by more than 0.3 V. Leaving the ENBL pin open turns off the device. Faster turn on time can be achieved using a smaller capacitor value on the VOCM pin. The capacitor must be large enough to minimize the common-mode noise. DECOUPLING INTERFACE DCPL (Pin 10) is connected to the internal bias node. DCPL provides the stable output common-mode voltage. Connect a 0.1 µF capacitor from the DCPL pin to ground for the best common-mode noise performance. PCB LAYOUT RECOMMENDATIONS Parasitic elements of the PCB, such as coupling and radiation, limit accuracy at very high frequencies. Ensure low loss power transmission from the connector to the internal circuit of the ADL6012. Microstrip and CPWG are popular forms of trans- mission lines because of their ease of fabrication and low cost (see Figure 65 and Figure 66). In the ADL6012 evaluation board (ADL6012-EVALZ), a grounded CPWG (GCPWG) minimizes radiation effects and provides the maximum band- width by using two rows of grounding vias on both sides of the signal trace. 15mils RO4003 VIA VIA 5mils 8mils 5mils Figure 65. CPWG Interface Design to RFIN for RO4003 Material (Not to Scale) Figure 66 shows the CPWG structure of the PCB layout. Microwave material RO4003 with 8 mil thickness is used in the ADL6012-EVALZ between the RF signal and ground layer. VIA VIA RFCM RFCM RFIN Figure 66. Suggested RF Input Layout SYSTEM CALIBRATION AND MEASUREMENT ERROR To achieve the highest detection accuracy, perform calibration at the board level because output voltages vary from device to device. Each device can be calibrated with two or more points in the linear region of the transfer function by applying CW input at different levels. The slope and intercept can be calculated as described in this section. Linear regression over the calibration range is recommended for best accuracy. Board level calibration is a simple method to improve the accuracy of the envelope detection. With a minimum of two point or more calibration, the entire detection range of the device can be calibrated to the highest accuracy possible. The measured ADL6012 transfer function at 18 GHz is shown in Figure 67 and the envelope output and linearity conformance error vs. the input peak voltage at various temperatures from −40°C to +125°C. Error over temperature is relative to the room 25°C curve. 4.0 0 0.5 2.5 1.0 3.0 1.5 2.0 3.5 3 –3 –2 2 –1 0 1 0 2.0 1.4 1.8 1.0 0.6 1.2 1.6 0.8 0.4 0.2 VPEAK (V) +125°C +105°C +85°C +25°C –40°C –55°C Figure 67. Differential VENV± Output Voltage and Error vs. Input Peak Voltage at 18 GHz |
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