Freescale Semiconductor

Errata

MSC8101CE0K40A

Rev. 5, 5/2005

© Freescale Semiconductor, Inc., 2004, 2005. All rights reserved.

This document presents the errata for the 0K40A mask of the Freescale MSC8101 device. The errata are classified

and numbered, and each erratum is provided with a description and workarounds. Table 1 lists the mask numbers

and the corresponding versions of the MSC8101 device.

Table 1. MSC8101 Mask Numbers and Revisions

MASK NUMBER

REVISION

0K40A

Rev0

1K42A

Rev0.1

2K42A

Rev0.2

1K87M

RevA

2K87M

RevA.2

Table 2. Silicon Errata

Errata

Number

Errata Description

Applies

to Mask

SIU1

Wrong Timer Advancement on RCCR

Date Added: 5/30/2000:

Description: MSC8101 and MPC826X treat the RCCR[TIMEP] value (UC timer) differently

then QUICC. In QUICC the timer advanced (N+1)*1024 cycles and in MSC8101/MPC826X the

timer advances N*1024 cycles.

Workaround: None

System Number: 1399

Fix Plan: Rev A

0K40A

Silicon Errata for the MSC8101

Processor, Mask 0K40A