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74LS174 数据表(PDF) 2 Page - ON Semiconductor

部件名 74LS174
功能描述  LOW POWER SCHOTTKY
PDF  8 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

74LS174 数据表(HTML) 2 Page - ON Semiconductor

  74LS174 Datasheet HTML 1Page - ON Semiconductor 74LS174 Datasheet HTML 2Page - ON Semiconductor 74LS174 Datasheet HTML 3Page - ON Semiconductor 74LS174 Datasheet HTML 4Page - ON Semiconductor 74LS174 Datasheet HTML 5Page - ON Semiconductor 74LS174 Datasheet HTML 6Page - ON Semiconductor 74LS174 Datasheet HTML 7Page - ON Semiconductor 74LS174 Datasheet HTML 8Page - ON Semiconductor  
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SN74LS174
http://onsemi.com
2
CONNECTION DIAGRAM DIP (TOP VIEW)
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Outputs
D0 – D5
CP
MR
Q0 – Q5
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
mA HIGH/1.6 mA LOW.
HIGH
LOW
(Note a)
LOADING
PIN NAMES
LOGIC DIAGRAM
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
DQ
CP
CD
Q5
Q4
Q3
Q2
Q1
Q0
CP
D5
D4
D3
D2
D1
D0
MR
14
2
6
7
3
4
5
9
11
12
10
13
15
DQ
CP
CD
DQ
CP
CD
DQ
CP
CD
DQ
CP
CD
DQ
CP
CD
1
14
13
12
11
10
9
12345
6
7
16
15
8
VCC
MR
Q5
D5
D4
Q4
Q3
D3
CP
Q0
D0
D1
Q1
D2
Q2
GND
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
LOGIC SYMBOL
VCC = PIN 16
GND = PIN 8
D5
D4
D3
D2
D1
D0
9
1
34 6 11 13 14
CP
MR
Q2
Q1
Q0
Q3 Q4 Q5
25 7 10 12 15



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