Bus Powered USB2.0 Flash Media Controller

Datasheet

SMSC USB2224

Page 7

Revision 1.3 (09-21-04)

DATASHEET

3.2

128 Pin List Table

3.2.1

128 Pin TQFP

PIN #

NAME

MA

PIN #

NAME

MA

PIN #

NAME

MA

PIN #

NAME

MA

1

MA0

8

33

MS_D2

8

65

CF_nCD2

-

97

ATEST

-

2

MA1

8

34

MS_D1

8

66

CF_IRQ

-

98

VDDP

3

MA2

8

35

MS_D0

8

67

CF_IORDY

-

99

XTAL2

-

4

VDDIO

36

MS_SCLK

8

68

CF_nIOR

8

100 XTAL1

-

5

MA3

8

37

MS_BS

8

69

CF_nIOW

8

101 VSSP

6

MA4

8

38

SD_nWP

-

70

CF_nRESET

8

102 VDDA(REF)

7

MA5

8

39

VDDIO

71

CF_nCS0

8

103 RBIAS

-

8

MA6

8

40

SD_DAT0

8

72

CF_nCS1

8

104 VSSA(REF)

9

MA7

8

41

SD_DAT1

8

73

CF_SA0

8

105 VDDA

10

MA8

8

42

SD_DAT2

8

74

VDDIO

106 USB+

-

11

MA9

8

43

SD_DAT3

8

75

CF_SA1

8

107 USB-

-

12

MA10

8

44

SD_CMD

8

76

CF_SA2

8

108 VSSA

13

MA11

8

45

SD_CLK

8

77

SM_D0

8

109 nRESET

-

14

MA12

8

46

CF_D0

8

78

SM_D1

8

110 VSSCORE

15

MA13

8

47

CF_D1

8

79

VSSIO

111 nTEST0

-

16

VDDCORE

48

CF_D2

8

80

SM_D2

8

112 nTEST1

-

17

MA14

8

49

CF_D3

8

81

SM_D3

8

113 GPIO1

8

18

MA15

8

50

CF_D4

8

82

SM_D4

8

114 GPIO2

8

19

MD0

8

51

VSSIO

83

SM_D5

8

115 GPIO3

8

20

MD1

8

52

VSSCORE

84

SM_D6

8

116 GPIO4

8

21

MD2

8

53

CF_D5

8

85

SM_D7

8

117 GPIO5

8

22

MD3

8

54

CF_D6

8

86

SM_ALE

8

118 GPIO6/ROMEN

8

23

VSSIO

55

CF_D7

8

87

SM_CLE

8

119 GPIO7

8

24

MD4

8

56

CF_D8

8

88

SM_nRE

8

120 GPIO8

8

25

MD5

8

57

CF_D9

8

89

SM_nWE

8

121 GPIO9

8

26

MD6

8

58

CF_D10

8

90

SM_nWP

8

122 GPIO10

8

27

MD7

8

59

CF_D11

8

91

VDDCORE

123 GPIO11

8

28

nMRD

8

60

CF_D12

8

92

SM_nCE

8

124 VSSIO

29

nMWR

8

61

CF_D13

8

93

VREG

125 GPIO12

8

30

nMCE

8

62

CF_D14

8

94

SM_nWPS

-

126 GPIO13

8

31

MS_INS

-

63

CF_D15

8

95

SM_nB/R

-

127 GPIO14

8

32

MS_D3

8

64

CF_nCD1

-

96

SM_nCD

-

128 GPIO15

8

Note 1:

RBIAS is connected to the Analog Ground plane VSSA(REF) via a resistor.

Note 2:

When the internal 1.8V regulator is enabled, VDDCORE (91) and VDDP(98), MUST have a 10uf +/- 20%,

(equivalent series resistance (ESR) <0.1ohm) bypass capacitor to VSSA.

Note 3:

VDDA(REF) and VSSA(REF) are same as the VDDA and VSSA respectively.