E

C

MODE

L

H

L

H

H

H

L

L

Addressable Latch

Memory

Active HIGH Eight-Channel

Demultiplexer

Clear

MODE SELECTION

X = Don’t Care Condition

L = LOW Voltage Level

H = HIGH Voltage Level

SN74LS259

http://onsemi.com

3

LOGIC DIAGRAM

E

C

14

12

67

3

4

5

9

11

12

10

13

15

GND = PIN 8

= PIN NUMBERS

FUNCTIONAL DESCRIPTION

The SN74LS259 has four modes of operation as shown in

the mode selection table. In the addressable latch mode, data

on the Data line (D) is written into the addressed latch.The

addressed latch will follow the data input with all

non-addressed latches remaining in their previous states. In

the memory mode, all latches remain in their previous state

and are unaffected by the Data or Address inputs.

In the one-of-eight decoding or demultiplexing mode, the

addressed output will follow the state of the D input with all

other inputs in the LOW state. In the clear mode all outputs

are LOW and unaffected by the address and data inputs.

When operating the SN74LS259 as an addressable latch,

changing more then one bit of the address could impose a

transient wrong address. Therefore, this should only be done

while in the memory mode.

The truth table below summarizes the operations.

TRUTH TABLE

PRESENT OUTPUT STATES

MODE

L H X

X

X

X

L

L

L

L

L

L

L

L

Clear

L LL

L

L

L

L

L

L

L

L

L

L

L

Demultiplex

L LH

L

L

L

H

LL

L

L

L

L

L

L LL

H

L

L

L

LL

L

L

L

L

L

L LH

H

L

L

L

HL

L

L

L

L

L

• ••

•

•

• ••

•

•

• ••

•

•

• ••

•

•

• ••

•

•

L LH

H

H

H

L

LL

L

L

L

L

H

H H X

X

X

X

Memory

H I

I

L

L

L

L

Addressable

H LH

L

L

L

H

Latch

H LL

H

L

L

H LH

H

L

L

• ••

•

•

• ••

•

•

• ••

•

•

• ••

•

•

• ••

•

•

H LL

H

H

H

L

H L H

H

H

H

H