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LT1913 数据表(PDF) 16 Page - Analog Devices |
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LT1913 数据表(HTML) 16 Page - Analog Devices |
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16 / 22 page ![]() LTC4368 16 Rev. B For more information www.analog.com APPLICATIONS INFORMATION Slow Shutdown The SHDN input turns off the external MOSFETs in a slow, controlled manner. When SHDN is asserted low, a 90µA current sink slowly begins to turn off the external MOSFETs. Once the voltage at the GATE pin falls below the voltage at the VOUT pin, the current sink is throttled back and a feedback loop takes over. This loop forces the GATE volt- age to track VOUT, thus keeping the external MOSFETs off as VOUT decays. Note that when VOUT < 2.5V, the GATE pin is pulled all the way to ground. Slow gate turn off reduces load current slew rates and mitigates voltage spikes due to parasitic inductances. To further decrease GATE pin slew rate, place a capacitor (CHOTSWAP, see Figure 11) across the gate and source terminals of the external MOSFETs. The waveforms of Figure 15 were captured using the Si7942 Dual N-channel MOSFETs, and a 2A load with 100µF output capacitor. VIN GREEN (TOP): MOSFET GATE BLUE (BOTTOM): MOSFET SOURCE 100ns/DIV 10V/DIV 4368 F13 Figure 13. Hot Swapping VIN to +48V SHDN GATE VOUT 100µF, 6Ω LOAD ON VOUT DUAL Si7942 MOSFET VIN = 12V 400µs/DIV 5V/DIV 4368 F15 GND Figure 15. Slow Shutdown: GATE Tracks VOUT as VOUT Decays 4368 F14 GATE MOSFET OFF MOSFET ON VIN VIN(UVLO) VUV tD(ON) Figure 14. Recovery Timing During Power-On OV = GND, UV = SHDN = VIN during the fast transients. To further improve positive hot swap, place the optional CHOTSWAP = 6.8nF capacitor across the gate/source of the external MOSFETs. For even more hot swap protection, add a diode (MBR0540) across RGATE (connect cathode to CGATE). Make sure this diode has a reverse breakdown of at least 40V. Recovery Delay Timer The LTC4368 has a recovery delay timer that filters noise at VIN and helps prevent chatter at VOUT. After either an OV or UV fault has occurred, the input supply must return to the desired operating voltage window for typically 32ms (tD(ON)) in order to turn the external MOSFET back on, as illustrated in Figure 5 and Figure 6. Going out of and then back into fault in fewer than 32ms will keep the MOSFET off continuously. Similarly, coming out of shutdown (SHDN low to high) triggers an 800µs startup delay timer (tSTART, see Figure 16). The recovery delay timer is also active while the LTC4368 is powering up. The 32ms timer starts once VIN rises above VIN(UVLO) and VIN lies within the user selectable UV/OV power good window. See Figure 14. GATE VOUT tD(SLOW) GATE = VOUT tSTART tSHDN(F) ΔVGATE SHDN 4368 F16 FAULT Figure 16. Slow Shutdown Timing |
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