4.2 PCB LAYOUT for MINIMIZING NOISE

In a noisy environment, such as a processor mother board,

layout considerations are very critical. Noise induced on

traces running between the remote temperature diode sen-

sor and the LM90 can cause temperature conversion errors.

Keep in mind that the signal level the LM90 is trying to

measure is in microvolts. The following guidelines should be

followed:

1.

Place a 0.1 µF power supply bypass capacitor as close

as possible to the V

capacitor as close as possible to the LM90’s D+ and D−

pins. Make sure the traces to the 2.2nF capacitor are

matched.

2.

The recommended 2.2nF diode bypass capacitor actu-

ally has a range of TBDpF to 3.3nF. The average tem-

perature accuracy will not degrade. Increasing the ca-

pacitance will lower the corner frequency where

differential noise error affects the temperature reading

thus producing a reading that is more stable. Con-

versely, lowering the capacitance will increase the cor-

ner frequency where differential noise error affects the

temperature reading thus producing a reading that is

less stable.

3.

Ideally, the LM90 should be placed within 10cm of the

Processor diode pins with the traces being as straight,

short and identical as possible. Trace resistance of 1

Ω

can cause as much as 1˚C of error. This error can be

compensated by using the Remote Temperature Offset

Registers, since the value placed in these registers will

automatically be subtracted from or added to the remote

temperature reading.

4.

Diode traces should be surrounded by a GND guard ring

to either side, above and below if possible. This GND

guard should not be between the D+ and D− lines. In the

event that noise does couple to the diode lines it would

be ideal if it is coupled common mode. That is equally to

the D+ and D− lines.

5.

Avoid routing diode traces in close proximity to power

supply switching or filtering inductors.

6.

Avoid running diode traces close to or parallel to high

speed digital and bus lines. Diode traces should be kept

at least 2cm apart from the high speed digital traces.

7.

If it is necessary to cross high speed digital traces, the

diode traces and the high speed digital traces should

cross at a 90 degree angle.

8.

The ideal place to connect the LM90’s GND pin is as

close as possible to the Processors GND associated

with the sense diode.

9.

Leakage current between D+ and GND should be kept

to a minimum. One nano-ampere of leakage can cause

as much as 1˚C of error in the diode temperature read-

ing. Keeping the printed circuit board as clean as pos-

sible will minimize leakage current.

Noise coupling into the digital lines greater than 400mVp-p

(typical hysteresis) and undershoot less than 500mV below

GND, may prevent successful SMBus communication with

the LM90. SMBus no acknowledge is the most common

symptom, causing unnecessary traffic on the bus. Although

the SMBus maximum frequency of communication is rather

low (100kHz max), care still needs to be taken to ensure

proper termination within a system with multiple parts on the

bus and long printed circuit board traces. An RC lowpass

filter with a 3db corner frequency of about 40MHz is included

on the LM90’s SMBCLK input. Additional resistance can be

added in series with the SMBData and SMBCLK lines to

further help filter noise and ringing. Minimize noise coupling

by keeping digital traces out of switching power supply areas

as well as ensuring that digital lines containing high speed

data communications cross at right angles to the SMBData

and SMBCLK lines.

20033717

FIGURE 15. Ideal Diode Trace Layout

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