AD8253 datasheet(16/34 Pages) AD

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LTC6373

Rev. 0

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PIN FUNCTIONS

–IN (Pin 1): Inverting Input of Instrumentation Amplifier.

Input voltage range is between V– + 3V and V+ – 3V.

A0 (Pin 2): Digital Gain Programming Pin 0. In combina-

tion with A2 and A1, the user can choose the desired gain

setting for the LTC6373 (refer to Gain Selection section

of this data sheet). The logic threshold for the A0 pin is

specified with respect to the voltage on the DGND pin

(logic low = any voltage between DGND and DGND + 0.6V;

logic high = any voltage between DGND + 1.5V and V+).

If the A0 pin is left floating, an internal resistor pulls its

voltage close to the DGND pin, resulting in a default logic

low state for this programming pin.

A1 (Pin 3): Digital Gain Programming Pin 1. In combina-

tion with A2 and A0, the user can choose the desired gain

setting for the LTC6373 (refer to Gain Selection section

of this data sheet). The logic threshold for the A1 pin is

specified with respect to the voltage on the DGND pin

(logic low = any voltage between DGND and DGND + 0.6V;

logic high = any voltage between DGND + 1.5V and V+).

If the A1 pin is left floating, an internal resistor pulls its

voltage close to the DGND pin, resulting in a default logic

low state for this programming pin.

V+ (Pin 4): Positive Power Supply. The operating voltage

range for V+ is (V– + 9V) ≤ V+ ≤ (V– + 36V).

V+OUT (Pin 5): Positive Power Supply for the Output

Differential Amplifier inside the LTC6373 (the amplifier

marked as A3 in Figure 1 of this data sheet). V+OUT pin is

normally tied to V+ pin, however the user may also choose

a lower voltage for V+OUT to save power dissipation or to

help protect ADC inputs. The voltage on V+OUT pin should

never be higher than V+ pin. The operating voltage range

for V+OUT is (V– + 9V) ≤ V+OUT ≤ V+.

+OUT (Pin 6): Positive Output Pin of Instrumentation

Amplifier.

–OUT (Pin 7): Negative Output Pin of Instrumentation

Amplifier.

VOCM (Pin 8): Output Common Mode Reference Voltage.

Voltage applied to this pin sets the output common mode

voltage level. If the VOCM pin is left floating, an internal

resistor divider creates a default voltage approximately

halfway between V+OUT and V–. The VOCM pin should be

decoupled to ground with a minimum of 0.1μF bypass

capacitor.

CAP (Pin 9): Bypass Capacitor Pin. The CAP pin should

be decoupled to ground with a 180pF bypass capacitor.

DGND (Pin 10): Reference for Digital Gain Programming

Pins (A2/A1/A0). DGND is normally tied to ground, how-

ever any voltage between V– and V+ – 2.5V may also be

chosen. If the DGND pin is left floating, an internal resistor

divider creates a default voltage approximately halfway

between V+ and V–. The logic threshold for A2/A1/A0 pins

is specified with respect to the DGND pin.

A2 (Pin 11): Digital Gain Programming Pin 2. In combina-

tion with A1 and A0, the user can choose the desired gain

setting for the LTC6373 (refer to Gain Selection section

of this data sheet). The logic threshold for the A2 pin is

specified with respect to the voltage on the DGND pin

(logic low = any voltage between DGND and DGND + 0.6V;

logic high = any voltage between DGND + 1.5V and V+).

If the A2 pin is left floating, an internal resistor pulls its

voltage close to the DGND pin, resulting in a default logic

low state for this programming pin.

+IN (Pin 12): Noninverting Input of Instrumentation

Amplifier. Input voltage range is between V– + 3V and

V+ – 3V.

V– (Exposed Pad Pin 13): Negative Power Supply. The

exposed pad must be soldered to PCB and connected

to V–.

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