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XIO2001ZWS 数据表(PDF) 58 Page - Texas Instruments |
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XIO2001ZWS 数据表(HTML) 58 Page - Texas Instruments |
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58 / 144 page  58 XIO2001 SCPS212I – MAY 2009 – REVISED JANUARY 2016 www.ti.com Product Folder Links: XIO2001 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated 8.4.31 Capability ID Register This read-only register identifies the linked list item as the register for Subsystem ID and Subsystem Vendor ID capabilities. The register returns 0Dh when read. PCI register offset: 40h Register type: Read-only Default value: 0Dh BIT NUMBER 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 1 1 0 1 8.4.32 Next Item Pointer Register The contents of this read-only register indicate the next item in the linked list of capabilities for the bridge. This register reads 48h pointing to the PCI Power Management Capabilities registers. PCI register offset: 41h Register type: Read-only Default value: 48h BIT NUMBER 7 6 5 4 3 2 1 0 RESET STATE 0 1 0 0 1 0 0 0 8.4.33 Subsystem Vendor ID Register This register, used for system and option card identification purposes, may be required for certain operating systems. This read-only register is initialized through the EEPROM and can be written through the subsystem access register at offset D0h. This register is reset by a PCI Express reset (PERST), a GRST, or the internally- generated power-on reset. PCI register offset: 44h Register type: Read-only Default value: 0000h BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8.4.34 Subsystem ID Register This register, used for system and option card identification purposes, may be required for certain operating systems. This read-only register is initialized through the EEPROM and can be written through the subsystem alias register. This register is reset by a PCI Express reset (PERST), a GRST, or the internally-generated power- on reset. PCI register offset: 46h Register type: Read-only Default value: 0000h BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8.4.35 Capability ID Register This read-only register identifies the linked list item as the register for PCI Power Management ID Capabilities. The register returns 01h when read. |
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