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TMS320F28375SPZP 数据表(PDF) 21 Page - Texas Instruments

部件名 TMS320F28375SPZP
功能描述  TMS320F2837xS Microcontrollers
PDF  229 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TMS320F28375SPZP 数据表(HTML) 21 Page - Texas Instruments

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TMS320F28379S, TMS320F28378S, TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com
SPRS881I – AUGUST 2014 – REVISED JUNE 2020
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28378S TMS320F28377S TMS320F28376S TMS320F28375S
TMS320F28374S
Terminal Configuration and Functions
Copyright © 2014–2020, Texas Instruments Incorporated
Table 4-1. Signal Descriptions (continued)
TERMINAL
I/O/Z(1)
DESCRIPTION
NAME
MUX
POSITION
ZWT
BALL
NO.
PTP
PIN
NO.
PZP
PIN
NO.
ADCIND2
T6
58
–
I
ADC-D input 2
CMPIN8P
I
Comparator 8 positive input
ADCIND3
U6
59
–
I
ADC-D input 3
CMPIN8N
I
Comparator 8 negative input
ADCIND4
T7
60
–
I
ADC-D input 4
ADCIND5
U7
–
–
I
ADC-D input 5
GPIO AND PERIPHERAL SIGNALS
GPIO0
0, 4, 8, 12
C8
160
–
I/O
General-purpose input/output 0
EPWM1A
1
O
Enhanced PWM1 output A (HRPWM-capable)
SDAA
6
I/OD
I2C-A data open-drain bidirectional port
GPIO1
0, 4, 8, 12
D8
161
–
I/O
General-purpose input/output 1
EPWM1B
1
O
Enhanced PWM1 output B (HRPWM-capable)
MFSRB
3
I/O
McBSP-B receive frame synch
SCLA
6
I/OD
I2C-A clock open-drain bidirectional port
GPIO2
0, 4, 8, 12
A7
162
91
I/O
General-purpose input/output 2
EPWM2A
1
O
Enhanced PWM2 output A (HRPWM-capable)
OUTPUTXBAR1
5
O
Output 1 of the output XBAR
SDAB
6
I/OD
I2C-B data open-drain bidirectional port
GPIO3
0, 4, 8, 12
B7
163
92
I/O
General-purpose input/output 3
EPWM2B
1
O
Enhanced PWM2 output B (HRPWM-capable)
OUTPUTXBAR2
2
O
Output 2 of the output XBAR
MCLKRB
3
I/O
McBSP-B receive clock
OUTPUTXBAR2
5
O
Output 2 of the output XBAR
SCLB
6
I/OD
I2C-B clock open-drain bidirectional port
GPIO4
0, 4, 8, 12
C7
164
93
I/O
General-purpose input/output 4
EPWM3A
1
O
Enhanced PWM3 output A (HRPWM-capable)
OUTPUTXBAR3
5
O
Output 3 of the output XBAR
CANTXA
6
O
CAN-A transmit
GPIO5
0, 4, 8, 12
D7
165
–
I/O
General-purpose input/output 5
EPWM3B
1
O
Enhanced PWM3 output B (HRPWM-capable)
MFSRA
2
I/O
McBSP-A receive frame synch
OUTPUTXBAR3
3
O
Output 3 of the output XBAR
CANRXA
6
I
CAN-A receive
GPIO6
0, 4, 8, 12
A6
166
–
I/O
General-purpose input/output 6
EPWM4A
1
O
Enhanced PWM4 output A (HRPWM-capable)
OUTPUTXBAR4
2
O
Output 4 of the output XBAR
EXTSYNCOUT
3
O
External ePWM synch pulse output
EQEP3A
5
I
Enhanced QEP3 input A
CANTXB
6
O
CAN-B transmit
GPIO7
0, 4, 8, 12
B6
167
–
I/O
General-purpose input/output 7
EPWM4B
1
O
Enhanced PWM4 output B (HRPWM-capable)
MCLKRA
2
I/O
McBSP-A receive clock
OUTPUTXBAR5
3
O
Output 5 of the output XBAR
EQEP3B
5
I
Enhanced QEP3 input B
CANRXB
6
I
CAN-B receive



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