L6986H datasheet(39/68 Pages) STMICROELECTRONICS

部件名	L6986H

功能描述	38 V, 2 A synchronous step-down switching regulator with 30 μA quiescent current

PDF	68 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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39 / 68 page

5.5

Compensation network design

The maximum bandwidth of the system can be designed up to fSW/6 up to 150 kHz maximum to guarantee a valid

small signal model.

RC=2⋅π⋅BW⋅COUT⋅VOUT

0.85V⋅gCS⋅gm TYP

(33)

where:

fPOLE= ωp2⋅π

(34)

ωp is defined by , gCS represents the current sense transconductance (see Table 1) and gm TYP the error

amplifier transconductance.

CC= 5

2⋅π⋅RC⋅BW

(35)

Example 2:

Considering VIN = 12 V, VOUT = 3.3 V, L = 6.8 µH, COUT = 10 µF, fSW = 500 kHz, IOUT = 1 A.

The maximum system bandwidth is 80 kHz. Assuming to design the compensation network to achieve a system

bandwidth of 70 kHz:

fPOLE=2.7 kHz

(36)

RLOAD=VOUTIOUT=3.3Ω

(37)

so accordingly with Eq. (33) and Eq. (35):

RC=48.5kΩ≈47kΩ

(38)

CC=237pF≈270pF

(39)

The gain and phase bode diagrams are plotted respectively in Figure 40. Magnitude plot for example 2 and

Figure 41. Phase plot for example 2.

Figure 40. Magnitude plot for example 2

L6986H

Compensation network design

DS12905 - Rev 2

page 39/68

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