STM32L412RBI6PXXX datasheet(17/192 Pages) STMICROELECTRONICS

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DS12469 Rev 8

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STM32L412xx

Functional overview

3.4

Embedded Flash memory

STM32L412xx devices feature 128Kbyte of embedded Flash memory available for storing

programs and data in single bank architecture.The Flash memory contains 64 pages of 2

Kbyte

Flexible protections can be configured thanks to option bytes:

•

Readout protection (RDP) to protect the whole memory. Three levels are available:

–

Level 0: no readout protection

–

Level 1: memory readout protection: the Flash memory cannot be read from or

written to if either debug features are connected, boot in RAM or bootloader is

selected

–

Level 2: chip readout protection: debug features (Cortex-M4 JTAG and serial

wire), boot in RAM and bootloader selection are disabled (JTAG fuse). This

selection is irreversible.

•

Write protection (WRP): the protected area is protected against erasing and

programming. Two areas can be selected, with 2-Kbyte granularity.

•

Proprietary code readout protection (PCROP): a part of the flash memory can be

protected against read and write from third parties. The protected area is execute-only:

it can only be reached by the STM32 CPU, as an instruction code, while all other

accesses (DMA, debug and CPU data read, write and erase) are strictly prohibited.

The PCROP area granularity is 64-bit wide. An additional option bit (PCROP_RDP)

allows the user to select if the PCROP area is erased or not when the RDP protection

is changed from Level 1 to Level 0.

The whole non-volatile memory embeds the error correction code (ECC) feature supporting:

•

single error detection and correction

•

double error detection.

Table 3. Access status versus readout protection level and execution modes

Area

Protection

level

User execution

Debug, boot from RAM or boot

from system memory (loader)

Read

Write

Erase

Read

Write

Erase

Main

memory

Yes

N/A

System

memory

Yes

N/A

Option

bytes

Yes

N/A

Backup

registers

1Yes

Yes

N/A(1)

1. Erased when RDP change from Level 1 to Level 0.

N/A(1)

Yes

N/A

SRAM2

Yes

Yes(1)

No(1)

Yes

N/A

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