STM32WL55CC datasheet(2/145 Pages) STMICROELECTRONICS

2 / 145 page

STM32WL55/54xx

2/145

DS13293 Rev 1

• Programmable voltage detector (PVD)

• VBAT mode with RTC and 20x32-byte backup

registers

Clock sources

• 32 MHz crystal oscillator

• TCXO support: programmable supply voltage

• 32 kHz oscillator for RTC with calibration

• High-speed internal 16 MHz factory trimmed

RC (± 1 %)

• Internal low-power 32 kHz RC

• Internal multi-speed low-power 100 kHz to

48 MHz RC

• PLL for CPU, ADC and audio clocks

Memories

• 256-Kbyte Flash memory

• 64-Kbyte RAM

• 20x32-bit backup register

• Bootloader supporting USART and SPI

interfaces

• OTA (over-the-air) firmware update capable

• Sector protection against read/write operations

Rich analog peripherals (down to 1.62 V)

• 12-bit ADC 2.5 Msps, up to 16 bits with

hardware oversampling, conversion range up

to 3.6 V

• 12-bit DAC, low-power sample-and-hold

• 2x ultra-low-power comparators

System peripherals

• Mailbox and semaphores for communication

between Cortex®-M4 and Cortex®-M0+

firmware

Controllers

• 2x DMA controller (7 channels each)

supporting ADC, DAC, SPI, I2C, LPUART,

USART, AES and timers

• 2x USART (ISO 7816, IrDA, SPI)

• 1x LPUART (low-power)

• 2x SPI 16 Mbit/s (1 over 2 supporting I2S)

• 3x I2C (SMBus/PMBus™)

• 2x 16-bit 1-channel timer

• 1x 16-bit 4-channel timer (supporting

motor control)

• 1x 32-bit 4-channel timer

• 3x 16-bit ultra-low-power timer

• 1x RTC with 32-bit sub-second wakeup

counter

• 1x independent SysTick

• 1x independent watchdog

• 1x window watchdog

Up to 43 I/Os, most 5 V-tolerant

Development support

• Serial-wire debug (SWD), JTAG

• Dual CPU cross trigger capabilities

All packages ECOPACK2 compliant

Table 1. Device summary

Reference

Part number

STM32WL55xx

STM32WL55CC, STM32WL55JC, STM32WL55UC

STM32WL54xx

STM32WL54CC, STM32WL54JC, STM32WL54UC

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