T835H-8I datasheet(5/11 Pages) STMICROELECTRONICS

5 / 11 page

Figure 7. Relative variation of gate trigger voltage and

current versus junction temperature (typical values)

0.5

1.5

-50

-25

100

125

150

IGT,VGT[Tj] / IGT,VGT[Tj = 25 °C]

Tj (°C)

IGT Q3

VGT

IGT Q1-Q2

Figure 8. Relative variation of holding current and

latching current versus junction temperature (typical

values)

0.4

0.8

1.2

1.6

-50

-25

100

125

150

IH,IL [Tj] / IH,IL [Tj = 25 °C]

Tj (°C)

Figure 9. Surge peak on-state current versus number of

cycles

100

1000

ITSM(A)

Number of cycles

Repetitive

Tc = 130°C

Non repetitive

Tj initial = 25 °C

t =20ms

One cycle

Figure 10. Non repetitive surge peak on-state current for a

sinusoidal pulse with width tp < 10 ms

100

1000

0.01

0.10

1.00

10.00

360°

Tj initial = 25 °C

TSM

ITSM(A)

dl/dt limitation: 100 A/µs

(ms)

Figure 11. Relative variation of static dV/dt immunity

versus junction temperature

360°

100

125

150

dV/dt [Tj] / dV/dt [Tj = 150 °C]

Tj(°C)

VD = VR = 536 V

Figure 12. Relative variation of critical rate of decrease of

main current versus junction temperature

100

125

150

(dl/dt)c [Tj] / (dl/dt)c [Tj = 150 °C]

Tj(°C)

T835H-8I

Characteristics (curves)

DS13573 - Rev 2

page 5/11

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