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TLV9152SIRUGR 数据表(PDF) 12 Page - Texas Instruments

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部件名 TLV9152SIRUGR
功能描述  TLV915x 4.5-MHz, Rail-to-Rail Input/Output, Low Offset Voltage, Low Noise Op Amp
PDF  72 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TLV9152SIRUGR 数据表(HTML) 12 Page - Texas Instruments

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6.4 Thermal Information for Single Channel (continued)
THERMAL METRIC (1)
TLV9151, TLV9151S
UNIT
DBV
(SOT-23)
DCK
(SC70)
DRL (2)
(SOT-553)
5 PINS
6 PINS
5 PINS
5 PINS
6 PINS
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
TBD
TBD
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2)
This package option is preview for TLV9151.
6.5 Thermal Information for Dual Channel
THERMAL METRIC (1)
TLV9152, TLV9152S
UNIT
D
(SOIC)
DDF
(SOT-23-8)
DGK (2)
(VSSOP)
DGS (2)
(VSSOP)
DSG
(WSON)
PW
(TSSOP)
RUG
(X2QFN)
8 PINS
8 PINS
8 PINS
10 PINS
8 PINS
8 PINS
10 PINS
RθJA
Junction-to-ambient
thermal resistance
138.7
143.5
176.5
TBD
77.6
185.1
142.3
°C/W
Rθ
JC(top)
Junction-to-case (top)
thermal resistance
78.7
79.9
68.1
TBD
93.7
74.0
53.5
°C/W
RθJB
Junction-to-board
thermal resistance
82.2
61.6
98.2
TBD
43.9
115.7
68.5
°C/W
ψJT
Junction-to-top
characterization
parameter
27.8
5.7
12.0
TBD
4.4
12.3
1.0
°C/W
ψJB
Junction-to-board
characterization
parameter
81.4
61.3
96.7
TBD
43.9
114.0
68.4
°C/W
Rθ
JC(bot)
Junction-to-case
(bottom) thermal
resistance
N/A
N/A
N/A
TBD
19.0
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2)
This package option is preview for TLV9152.
6.6 Thermal Information for Quad Channel
THERMAL METRIC (1)
TLV9154, TLV9154S
UNIT
D
(SOIC)
PW
(TSSOP)
RTE (2)
(WQFN)
RUC
(WQFN)
14 PINS
14 PINS
16 PINS
14 PINS
RθJA
Junction-to-ambient thermal resistance
101.4
131.4
TBD
125.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
57.6
51.8
TBD
39.8
°C/W
RθJB
Junction-to-board thermal resistance
57.3
75.8
TBD
68.0
°C/W
ψJT
Junction-to-top characterization parameter
18.5
7.9
TBD
0.8
°C/W
ψJB
Junction-to-board characterization
parameter
56.9
74.8
TBD
67.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal
resistance
N/A
N/A
TBD
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2)
This package option is preview for TLV9154.
TLV9151, TLV9152, TLV9154
SBOS986C – OCTOBER 2019 – REVISED DECEMBER 2020
www.ti.com
12
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: TLV9151 TLV9152 TLV9154



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