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TSZ182 数据表(PDF) 6 Page - STMicroelectronics |
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TSZ182 数据表(HTML) 6 Page - STMicroelectronics |
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6 / 43 page ![]() Symbol Parameter Conditions Min. Typ. Max. Unit Iout Isink (Vout = VCC) T = 25 °C 10 15 mA -40 °C < T< 125 °C 7.5 Isource (Vout = 0 V) T = 25 °C 6 11 -40 °C < T< 125 °C 4 ICC Supply current (per channel, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 0.7 1 mA -40 °C < T< 125 °C 1.2 AC performance GBP Gain bandwidth product T = 25 °C, RL = 10 kΩ, CL = 100 pF 2 2.8 MHz -40 °C < T< 125 °C, RL = 10 kΩ, CL = 100 pF 1.6 Φm Phase margin RL = 10 kΩ, CL = 100 pF 56 degrees Gm Gain margin 15 dB SR Slew rate (3) T = 25 °C 2.6 4.5 V/µs -40 °C < T< 125 °C 2.1 ts Settling time To 0.1%, Vin = 1.2 Vpp 550 ns en Equivalent input noise voltage density f = 1 kHz 40 nV/√Hz f = 10 kHz 40 en-pp Voltage noise f = 0.1 to 10 Hz 0.5 µVpp Cs Channel separation f = 1 kHz 120 dB tinit Initialization time, G = 100 (4) T = 25 °C 60 µs -40 °C < T< 125 °C 100 1. See Section 5.5 Input offset voltage drift over temperature. Input offset measurements are performed on x100 gain configuration. The amplifiers and the gain setting resistors are at the same temperature. 2. Guaranteed by design. 3. Slew rate value is calculated as the average between positive and negative slew rates. 4. Initialization time is defined as the delay between the moment when supply voltage exceeds 2.2 V and output voltage stabilization Table 5. Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 °C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio Input offset voltage T = 25 °C 1 25 µV -40 °C < T< 125 °C 35 ΔVio/ΔT Input offset voltage drift (1) -40 °C < T< 125 °C 0.1 µV/°C Iib Input bias current (Vout = VCC//2) T = 25 °C 30 200 (2) pA -40 °C < T< 125 °C 300 (2) Iio Input offset current (Vout = VCC/2) T = 25 °C 60 400 (2) -40 °C < T< 125 °C 600 (2) TSZ181, TSZ182 Electrical characteristics DS11863 - Rev 5 page 6/43 |
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