time

time

with pulse skipping

without pulse skipping

skipped cycles

4.8

Direct feedback

The IC embeds a transconductance type error amplifier (E/A) whose inverting input and output are FB and

In non-isolated topologies, a positive output voltage can be tightly set through a simple voltage divider applied

among the output voltage terminal, FB and GND.

The E/A output is scaled down and fed into the PWM comparator, where it is compared to the voltage across the

sense resistor in series to the sense-FET, thus setting the cycle-by-cycle drain current limitation.

An R-C network connected on the output of the error amplifier (COMP) is usually used to stabilize the overall

control loop.

The FB is provided with an internal pull-up to prevent a wrong IC behavior when the pin is accidentally left

floating.

4.9

Secondary feedback

With this setting, COMP is internally connected to the parallel of a 100 uA current generator and the 15 kΩ (typ.)

This allows to set the output voltage value through an external error amplifier (TS431 or similar) placed on the

secondary side, whose error signal is used to set the DRAIN peak current setpoint corresponding to the output

power demand. If isolation is required, the error signal must be transferred through an optocoupler, with the

phototransistor collector connected across COMP and GND.

4.10

Pulse frequency modulation

are skipped. This kind of operation is referred to as “pulse frequency modulation” (PFM), the number of the

skipped cycles depending on the balance between the output power demand and the power transferred from the

input. The result is an equivalent switching frequency which can go down to some hundreds Hz, thus reducing all

the frequency-related losses.

VIPER31

Direct feedback

DS13285 - Rev 3

page 17/40