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ADP7118ARDZ-R7 数据表(PDF) 1 Page - Analog Devices |
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ADP7118ARDZ-R7 数据表(HTML) 1 Page - Analog Devices |
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1 / 24 page ![]() 20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator Data Sheet ADP7118 Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Low noise: 11 µV rms independent of fixed output voltage PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT ≤ 5 V, VIN = 7 V Input voltage range: 2.7 V to 20 V Maximum output current: 200 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature −1.2% to +1.5%, TJ = −40°C to +85°C ±1.8%, TJ = −40°C to +125°C Low dropout voltage: 200 mV (typical) at a 200 mA load, VOUT = 5 V User programmable soft start (LFCSP and SOIC only) Low quiescent current, IGND = 50 μA (typical) with no load Low shutdown current: 1.8 μA at VIN = 5 V, 3.0 μA at VIN = 20 V Stable with a small 2.2 µF ceramic output capacitor Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.0 V 16 standard voltages between 1.2 V and 5.0 V are available Adjustable output from 1.2 V to VIN – VDO, output can be adjusted above initial set point Precision enable 2 mm × 2 mm, 6-lead LFCSP, 8-Lead SOIC, 5-Lead TSOT AEC-Q100 qualified for automotive applications APPLICATIONS Regulation to noise sensitive applications ADC and DAC circuits, precision amplifiers, power for VCO VTUNE control Communications and infrastructure Medical and healthcare Industrial and instrumentation Supported by ADIsimPower tool TYPICAL APPLICATION CIRCUITS GND EN SS VIN VOUT ADP7118 ON OFF VIN = 6V VOUT = 5V SENSE/ADJ CIN 2.2µF COUT 2.2µF CSS 1nF Figure 1. ADP7118 with Fixed Output Voltage, 5 V GND EN SS VIN VOUT ADP7118 ON OFF VIN = 7V VOUT = 6V SENSE/ADJ CIN 2.2µF COUT 2.2µF CSS 1nF 2kΩ 10kΩ Figure 2. ADP7118 with 5 V Output Adjusted to 6 V GENERAL DESCRIPTION The ADP7118 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 20 V and provides up to 200 mA of output current. This high input voltage LDO is ideal for the regulation of high performance analog and mixed-signal circuits operating from 19 V down to 1.2 V rails. Using an advanced proprietary architecture, the device provides high power supply rejection, low noise, and achieves excellent line and load transient response with a small 2.2 µF ceramic output capacitor. The ADP7118 regulator output noise is 11 μV rms independent of the output voltage for the fixed options of 5 V or less. The ADP7118 is available in 16 fixed output voltage options. The following voltages are available from stock: 1.2 V (adjustable), 1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.0 V. Additional voltages available by special order are 1.5 V, 1.85 V, 2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V, 3.8 V, 4.2 V, and 4.6 V. Each fixed output voltage can be adjusted above the initial set point with an external feedback divider. This allows the ADP7118 to provide an output voltage from 1.2 V to VIN − VDO with high PSRR and low noise. User programmable soft start with an external capacitor is available in the LFCSP and SOIC packages. The ADP7118 is available in a 6-lead, 2 mm × 2 mm LFCSP making it not only a very compact solution, but it also provides excellent thermal performance for applications requiring up to 200 mA of output current in a small, low profile footprint. The ADP7118 is also available in a 5-lead TSOT and an 8-lead SOIC. |
类似零件编号 - ADP7118ARDZ-R7 |
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类似说明 - ADP7118ARDZ-R7 |
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