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TMS320F28069MPZPQ 数据表(PDF) 16 Page - Texas Instruments |
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TMS320F28069MPZPQ 数据表(HTML) 16 Page - Texas Instruments |
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16 / 185 page ![]() PIN NAME PIN NO. I/O/Z DESCRIPTION PZ PZP PN PFP GPIO10 74 60 I/O/Z General-purpose input/output 10 EPWM6A O Enhanced PWM6 output A and HRPWM channel Reserved – Reserved ADCSOCBO O ADC start-of-conversion B GPIO11 73 59 I/O/Z General-purpose input/output 11 EPWM6B O Enhanced PWM6 output B SCIRXDB I SCI-B receive data ECAP1 I/O Enhanced Capture input/output 1 GPIO12 44 35 I/O/Z General-purpose input/output 12 TZ1 I Trip Zone input 1 SCITXDA O SCI-A transmit data SPISIMOB I/O SPI-B slave in, master out GPIO13 95 75 I/O/Z General-purpose input/output 13 TZ2 I Trip Zone input 2 Reserved – Reserved SPISOMIB I/O SPI-B slave out, master in GPIO14 96 76 I/O/Z General-purpose input/output 14 TZ3 I Trip zone input 3 SCITXDB O SCI-B transmit data SPICLKB I/O SPI-B clock input/output GPIO15 88 70 I/O/Z General-purpose input/output 15 ECAP2 I/O Enhanced Capture input/output 2 SCIRXDB I SCI-B receive data SPISTEB I/O SPI-B slave transmit enable input/output GPIO16 55 44 I/O/Z General-purpose input/output 16 SPISIMOA I/O SPI-A slave in, master out Reserved – Reserved TZ2 I Trip Zone input 2 GPIO17 52 42 I/O/Z General-purpose input/output 17 SPISOMIA I/O SPI-A slave out, master in Reserved – Reserved TZ3 I Trip zone input 3 GPIO18 51 41 I/O/Z General-purpose input/output 18 SPICLKA I/O SPI-A clock input/output SCITXDB O SCI-B transmit data XCLKOUT O/Z Output clock derived from SYSCLKOUT. XCLKOUT is either the same frequency, one- half the frequency, or one-fourth the frequency of SYSCLKOUT. This is controlled by bits 1:0 (XCLKOUTDIV) in the XCLK register. At reset, XCLKOUT = SYSCLKOUT/4. The XCLKOUT signal can be turned off by setting XCLKOUTDIV to 3. The mux control for GPIO18 must also be set to XCLKOUT for this signal to propogate to the pin. GPIO19 64 52 I/O/Z General-purpose input/output 19 XCLKIN I External Oscillator Input. The path from this pin to the clock block is not gated by the mux function of this pin. Care must be taken not to enable this path for clocking if it is being used for the other peripheral functions. SPISTEA I/O SPI-A slave transmit enable input/output SCIRXDB I SCI-B receive data ECAP1 I/O Enhanced Capture input/output 1 TMS320F28069, TMS320F28069M, TMS320F28069F, TMS320F28068M, TMS320F28068F TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064, TMS320F28063 TMS320F28062, TMS320F28062F SPRS698I – NOVEMBER 2010 – REVISED FEBRUARY 2021 www.ti.com 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28069 TMS320F28069M TMS320F28069F TMS320F28068M TMS320F28068F TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 TMS320F28062F |
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