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TMS320F28375SPZPQR 数据表(PDF) 76 Page - Texas Instruments |
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TMS320F28375SPZPQR 数据表(HTML) 76 Page - Texas Instruments |
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76 / 225 page  7.9.7.1 External Interrupt (XINT) Electrical Data and Timing Section 7.9.7.1.1 lists the external interrupt timing requirements. Section 7.9.7.1.2 lists the external interrupt switching characteristics. Figure 7-16 shows the external interrupt timing. 7.9.7.1.1 External Interrupt Timing Requirements MIN MAX UNIT(1) tw(INT) Pulse duration, INT input low/high Synchronous 2tc(SYSCLK) cycles With qualifier tw(IQSW) + tw(SP) + 1tc(SYSCLK) cycles (1) For an explanation of the input qualifier parameters, see Section 7.9.6.2.1. 7.9.7.1.2 External Interrupt Switching Characteristics over recommended operating conditions (unless otherwise noted)(1) PARAMETER MIN MAX UNIT td(INT) Delay time, INT low/high to interrupt-vector fetch(2) tw(IQSW) + 14tc(SYSCLK) tw(IQSW) + tw(SP) + 14tc(SYSCLK) cycles (1) For an explanation of the input qualifier parameters, see Section 7.9.6.2.1. (2) This assumes that the ISR is in a single-cycle memory. Interrupt Vector XINT1, XINT2, XINT3, XINT4, XINT5 Address bus (internal) t w(INT) t d(INT) Figure 7-16. External Interrupt Timing TMS320F28379S, TMS320F28378S, TMS320F28377S, TMS320F28377S-Q1 TMS320F28376S, TMS320F28375S, TMS320F28375S-Q1, TMS320F28374S SPRS881J – AUGUST 2014 – REVISED FEBRUARY 2021 www.ti.com 76 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28379S TMS320F28378S TMS320F28377S TMS320F28377S-Q1 TMS320F28376S TMS320F28375S TMS320F28375S-Q1 TMS320F28374S |
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