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LP8733 数据表(PDF) 63 Page - Texas Instruments |
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LP8733 数据表(HTML) 63 Page - Texas Instruments |
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63 / 86 page ![]() SW_B0 VIN_B0 VIN_B1 VANA VIN FB_B0 VOUT_B0 SDA SCL nINT CLKIN (GPO2) GNDs EN GPO SW_B1 FB_B1 VOUT_B1 PGOOD VOUT_LDO1 VOUT_LDO0 VIN_LDO0 VIN_LDO1 VOUT_LDO0 VOUT_LDO1 Copyright © 2017, Texas Instruments Incorporated COUT_BUCK0 COUT_BUCK1 COUT_LDO1 COUT_LDO0 CIN_LDO1 CIN_LDO0 CIN_BUCK0 CIN_BUCK1 CANA L0 L1 LOAD CPOL_BUCK0 LOAD CPOL_BUCK1 63 LP8733 www.ti.com SNVSBK2 – SEPTEMBER 2019 Product Folder Links: LP8733 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LP8733xx is a power management unit including two step-down regulators, two linear regulators, and two general-purpose digital output signals. 8.2 Typical Applications Figure 68. Two Single-Phase Buck Outputs Configuration |
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