UT12N10L-TN3-R datasheet(2/7 Pages) VBSEMI

2 / 7 page

Notes:

a. Guaranteed by design, not subject to production testing.

b. Pulse test; pulse width

 300 µs, duty cycle  2 %.

c. Independent of operating temperature.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation

of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect device reliability.

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

Parameter

Symbol

Test Conditions

Min.

Typ.a

Max.

Unit

Static

Drain-Source Breakdown Voltage

VDS

VGS = 0 V, ID = 250 µA

100

Gate Threshold Voltage

VGS(th)

VDS = VGS, ID = 250 µA

Gate-Body Leakage

IGSS

VDS = 0 V, VGS = ± 20 V

± 100

Zero Gate Voltage Drain Current

IDSS

VDS = 100 V, VGS = 0 V

µA

VDS = 100 V, VGS = 0 V, TJ = 125 °C

VDS = 100 V, VGS = 0 V, TJ = 175 °C

250

On-State Drain Currentb

ID(on)

VDS =5 V, VGS = 10 V

Drain-Source On-State Resistanceb

RDS(on)

VGS = 10 V, ID = 3 A



VGS = 10 V, ID = 3 A, TJ = 125 °C

VGS = 10 V, ID = 3 A, TJ = 175 °C

140

VGS = 4.5 V ID = 3 A

Forward Transconductanceb

gfs

VDS = 15 V, ID = 3 A

Dynamica

Input Capacitance

Ciss

VGS = 0 V, VDS = 25 V, F = 1 MHz

950

Output Capacitance

Coss

120

Reverse Transfer Capacitance

Crss

Total Gate Chargec

VDS = 50 V, VGS = 10 V, ID = 3 A

Gate-Source Chargec

Qgs

Gate-Drain Chargec

Qgd

Gate Resistance

0.5

2.9



Turn-On Delay Timec

td(on)

VDD = 50 V, RL = 5.2 Ω

ID ≅ 3 A, VGEN = 10 V, Rg = 2.5 Ω

Rise Timec

Turn-Off Delay Timec

td(off)

Fall Timec

Source-Drain Diode Ratings and Characteristics (TC = 25 °C)

Pulsed Current

ISM

Diode Forward Voltageb

VSD

IF = 3 A, VGS = 0 V

0.9

1.5

Source-Drain Reverse Recovery Time

trr

IF = 3 A, dI/dt = 100 A/µs

180

250

114

1.0

2.5

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UT12N10L-TN3-R

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