STV7618

13/15

AC TIMING REQUIREMENTS

(Vcc = 4.5v to 5.5v, T amb = -20 to +85

°C, input signals max leading edge & trailing edge (tr,tf) = 5ns)

AC TIMING CHARACTERISTICS

(Vcc = 5V, Vpp = 70V, Vssp = 0V, Vsssub = 0V, Vsslog = 0V, Tamb = 25

°C, FCLK = 40MHz,)

( Vilmax = 0.2Vcc, Vihmin = 0.8Vcc)

Note 9: one output among 96, loading capacitor CL = 50pF, other outputs at low level

Symbol

Parameter

Min

Typ

Max

Unit

Data clock period

25

-

-

ns

Duration of CLK pulse at high level

10

-

-

ns

Duration of CLK pulse at low level

10

-

-

ns

Set-up time of data input before low to high clock transition

5

-

-

ns

Hold-time of data input after low to high clock transition

5

-

-

ns

Hold-time of STB after low to high clock transition

5

-

-

ns

STB low level pulse duration

10

-

-

ns

STB set-up time before CLK rise

5

ns

Symbol

Parameter

Min

Typ

Max

Unit

Delay of power output change after CLK transition

- high to low

- low to high

-

-

35

30

100

100

ns

ns

Delay of power output change after STB transition

- high to low

- low to high

-

30

25

95

95

ns

ns

Delay of power output change after BLK, POC transition

- high to low

- low to high

-

25

20

90

90

ns

ns

Power output rise time (Note 9)

50

90

200

ns

Power output fall time (Note 9)

50

120

200

ns