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ADRF6755ACPZ-R7 数据表(PDF) 20 Page - Analog Devices

部件名 ADRF6755ACPZ-R7
功能描述  100 MHz to 2400 MHz I/Q Modulator with Integrated Fractional-N PLL and VCO
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF6755ACPZ-R7 数据表(HTML) 20 Page - Analog Devices

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ADRF6755
Data Sheet
Rev. B | Page 20 of 48
Figure 47. Attenuator Settling Time to 0.2 dB and 0.5 dB Distribution at
Nominal and Worst-Case Conditions for Typical Small Step
Figure 48. Attenuator Settling Time to 0.2 dB and 0.5 dB Distribution at
Nominal and Worst-Case Conditions for Worst-Case Small Step (36 dB to 42 dB)
Figure 49. Attenuator Settling Time to 0.2 dB and 0.5 dB Distribution at
Nominal and Worst-Case Conditions for Typical Large Step
Figure 50. Attenuator Settling Time to 0.2 dB and 0.5 dB Distribution at
Nominal and Worst-Case Conditions for Worst-Case Large Step
(47 dB to 0 dB)
Figure 51. TXDIS Settling Time at Worst-Case Supply
and Temperature
0
10
20
30
40
50
60
70
80
90
100
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
ATTENUATOR SETTLING TIME (µs)
NOMINAL SETTLING TIME TO 0.2dB
WORST CASE SETTLING TIME TO 0.2dB
NOMINAL SETTLING TIME TO 0.5dB
WORST CASE SETTLING TIME TO 0.5dB
0
10
20
30
40
50
60
70
80
90
100
0
3
6
9
12
15
18
21
24
ATTENUATOR SETTLING TIME (µs)
NOMINAL SETTLING TIME TO 0.2dB
WORST CASE SETTLING TIME TO 0.2dB
NOMINAL SETTLING TIME TO 0.5dB
WORST CASE SETTLING TIME TO 0.5dB
0
10
20
30
40
50
60
70
80
90
100
0
3
6
9
12
15
18
21
ATTENUATOR SETTLING TIME (µs)
NOMINAL SETTLING TIME TO 0.2dB
WORST CASE SETTLING TIME TO 0.2dB
NOMINAL SETTLING TIME TO 0.5dB
WORST CASE SETTLING TIME TO 0.5dB
0
5
10
15
20
25
30
35
40
45
50
0
3
6
9
12
15
18
21
24
27
30
33
ATTENUATOR SETTLING TIME (µs)
NOMINAL SETTLING TIME TO 0.2dB
WORST CASE SETTLING TIME TO 0.2dB
NOMINAL SETTLING TIME TO 0.5dB
WORST CASE SETTLING TIME TO 0.5dB
–70
–60
–50
–40
–30
–20
–10
0
0
1
2
3
4
5
6
7
8
TXDIS SETTLING TIME (μs)
TXDIS
TURN-ON = 180ns
TURN-OFF= 350ns



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