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MCP1650 数据表(PDF) 20 Page - Microchip Technology

部件名 MCP1650
功能描述  750 kHz Boost Controller
PDF  28 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP1650 数据表(HTML) 20 Page - Microchip Technology

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MCP1650/51/52/53
DS21876A-page 20
 2004 Microchip Technology Inc.
6.0
TYPICAL LAYOUT
FIGURE 6-1:
MCP1650/51/52/53 Application Schematic.
When designing the physical layout for the MCP1650/
51/52/53, the highest priority should be placing the
boost power train components in order to minimize the
size of the high current paths. It is also important to pro-
vide ground-path separation between the large-signal
power train ground and the small signal feedback path
and feature grounds. In some cases, additional filtering
on the VIN pin is helpful to minimize MCP1650/51/52/53
input noise.
In this layout example, the critical power train paths are
from input to output, +VIN
_1 to F
1 to C2 to L1 to Q1 to
GND. Current will flow in this path when the switch (Q1)
is turned on. When Q1 is turned off, the path for current
flow will quickly change to +VIN
_1 to F
1 to L1 to D1 to
C1 to R4 to GND. When starting the layout for this appli-
cation, both of these power train paths should be as
short as possible. The C2, Q1 and R4 GND connections
should all be connected to a single “Power Ground”
plane to minimize any wiring inductance.
Bold traces are used to represent high-current
connections and should be made as wide as is
practical.
R1 and C3 is an optional filter that reduces the
switching noise on the VIN pin of the MCP1650/51/52/
53. This should be considered for high-power
applications (> 1W) and bootstrap applications where
VIN of the MCP1650/51/52/53 is supplied by the output
voltage of the boost regulator.
The feedback resistor divider that sets the output
voltage should be considered sensitive and be routed
away from the power-switching components discussed
previously.
As shown in the diagram, R6, R8 and the GND pin of
the MCP1650/51/52/53 should be returned to an
analog ground plane.
The analog ground plane and power ground plane
should be connected at a single point close to the input
capacitor (C2).
Single-Cell Li-Ion
Input (2.8V to 4.8V)
+5V Output @ 1A
Low Input
Coilcraft
®
DO1813HC
PGND
PGND
PGND
AGND
AGND
C3
0.1µ
C2
47µ
TP1
+V
IN_1
TP2
+V
OUT_1
TP4
GND
R5
73.2K
R8
49.9K
AGND
AGND
VR
VR
0
0
0
0
0
0
0
D1
3.3 µH
B330ADIC
L1
R3
3.09K
R7
562
R6
1K
MCP1651_MSOP
3
1
4
2
5
6
7
8
D2
LED
F1
MCP1651R
(+2.8V to +4.8V Input to +5V Output @ 1A)
2A Power Train Path
Q1
IRLML2502
/SHDN
LBI
GND
CS
EXT
FB
/LBO
V
IN
R2
49.9K
Keep Away From Switching Section
TP5
/SHDN1
R4
0.1
TP3
GND
C1
47µ
FUSE
R1
100



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