6.2

Microcontroller unit

The integrated MCU is the STM32F031x6 with the following main characteristics:

•

•

Memories: 4kB of SRAM, 32 kB of Flash Memory

•

CRC calculation unit

•

Up to 21 fast I/Os

•

Advanced-control timer dedicated for PWM generation

•

Up to 6 general purpose timers

•

12-bit ADC (up to 10 channels)

•

•

Serial Wire Debug (SWD)

•

Extended temperature range: -40 to 125°C

Note:

For more details refer to the STM32F031x6 datasheet on www.st.com

6.2.1

Memories and boot mode

The device has the following features:

•

4 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait states and featuring

embedded parity checking with exception generation for fail-critical applications.

•

The non-volatile memory is divided into two arrays:

–

32 Kbytes of embedded Flash memory for programs and data

–

Option bytes

The option bytes are used to write-protect the memory (with 4 KB granularity) and/or readout-protect the whole

memory with the following options:

•

Level 0: no readout protection

•

Level 1: memory readout protection, the Flash memory cannot be read from or written to if either debug

features are connected or boot in RAM is selected

•

disabled.

At startup, the boot pin and boot selector option bit are used to select one of the three boot

options:

•

boot from User Flash memory

•

boot from System Memory

•

boot from embedded SRAM

The boot loader is located in System Memory, programmed by ST during production. It is used to reprogram the

Flash memory by using USART on pins PA14/PA15.

6.2.2

Power management

The VDD pin is the power supply for I/Os and the internal regulator.

The VDDA pin is power supply for ADC, Reset blocks, RCs and PLL. The VDDA voltage is provided externally

through VDDA pin

Note:

The VDDA voltage level must be always greater or equal to the VDD voltage level and must be established first.

The MCU has integrated power-on reset (POR) and power-down reset (PDR) circuits. They are always active,

and ensure proper operation above a threshold of 2 V. The device remains in reset mode when the monitored

supply voltage is below a specified threshold, VPOR/PDR, without the need for an external reset circuit.

•

The POR monitors only the VDD supply voltage. During the startup phase it is required that VDDA should

arrive first and be greater than or equal to VDD.

•

The PDR monitors both the VDD and VDDA supply voltages, however the VDDA power supply supervisor

can be disabled (by programming a dedicated Option bit) to reduce the power consumption if the application

design ensures that VDDA is higher than or equal to VDD.

STSPIN32F0601, STSPIN32F0602

Microcontroller unit

DS12981 - Rev 5

page 20/32